Papers by Jose L. Huertas
Combination of A/D-D/A converters allows implementing both long-term analog memory and multiplier... more Combination of A/D-D/A converters allows implementing both long-term analog memory and multiplier/divider operations. An efficient design based on continuous-time, current-mode, dividing-algorithmic converters is presented in this paper. It offers high-speed and low-voltage operation with low or middle resolution. Experimental results of two CMOS-2.4µm prototypes (with 5-and 7-bit data converters) are provided.
ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)
Combination of A/D-D/A converters allows implementing multiplier/divider operations. An efficient... more Combination of A/D-D/A converters allows implementing multiplier/divider operations. An efficient design based on continuous-time, current-mode, dividing-algorithmic converters is presented in this paper. It offers high speed and capability of low voltage operation, and it is suitable for applications of low or middle resolution (below 9 bits). In addition, the division result is given in both analog and digital formats. Experimental results from a CMOS prototype with 5 bit resolution are included.
1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96
This paper describes a programmable fuzzy controller chip designed with mixed-signal IC technique... more This paper describes a programmable fuzzy controller chip designed with mixed-signal IC techniques. Its input and output signals are analog to directly interact with the information from the real world. The programmability interface is digital and the output signal is also given in digital format to allow easy embedding into digital processing environments. Experimental results from a prototype integrated in a 2.4-µm CMOS process are included.
Digest of Papers IEEE International Workshop on IDDQ Testing
The success of I ddq testing for digital circuits has motivated several groups to investigate if ... more The success of I ddq testing for digital circuits has motivated several groups to investigate if the same or a similar method could be applied to analogue domain. The diverse behavior of analogue circuits regarding quiescent current and the problem of global variations in nominal values are serious handicaps in obtaining a generic current-mode test method to be applied off chip. A promising test procedure is the built-in self-testing (BIST) technique for which circuits with class A behavior are specially suited. This paper focuses on these type of circuits and in particular those based on symmetric OTAs. Two BIST techniques that permit low silicon area overheads, low voltage operation, and negligible influence on the circuit performance are proposed and discussed. Hspice simulations from a 5th order OTA-C elliptic filter show that global fault coverages of 92.2% and 96.6% are achieved by the two techniques.
Proceedings of the Third Ieee Conference on Fuzzy Systems - Ieee World Congress on Computational Intelligence, Vols I-Iii, 1994
This paper explores the solutions offered by Switched Capacitor (SC) techniques for the implement... more This paper explores the solutions offered by Switched Capacitor (SC) techniques for the implementation of fuzzy circuits. The architecture of a microcontroller is presented to perform the simplified inference method and the circuit realizations of the different blocks are described. The design technique achieves high operation speed, typical in analog operation, and at the same time allows the programming ease which is characteristic of digital implementations. Finally, due to the defuzzifier used, the proposed microcontroller may interact with either an analog or digital system at the output.
2011 20th Asian Test Symposium, 2011
This work demonstrates that multi-VDD conditions may be used to improve the accuracy of machine l... more This work demonstrates that multi-VDD conditions may be used to improve the accuracy of machine learning models, significantly decreasing the prediction error. The proposed technique has been successfully applied to a previous alternate test strategy for LNAs based on response envelope detection. A prototype has been developed to show its feasibility. The prototype consists of a low-power 2.4GHz LNA and a simple envelope detector, integrated in a 90nm CMOS technology. Postlayout simulation results are provided to verify the functionality of the approach.
Analog Integrated Circuits and Signal Processing, 2000
Multiplier and divider circuits are usually required in the fields of analog signal processing an... more Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/ divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design based on current-mode data converters is presented herein. Continuous-time algorithmic converters are chosen to reduce the control circuitry and to obtain a modular design based on a cascade of bit cells. Several circuit structures to implement these cells are presented and discussed. The one that is selected enables a better trade-off speed/power than others previously reported in the literature while maintaining a low area occupation. The resulting multiplier/divider circuit offers a low voltage operation, provides the division result in both analog and digital formats, and it is suitable for applications of low or middle resolution (up to 9 bits) like applications to fuzzy controllers. The analysis is illustrated with Hspice simulations and experimental results from a CMOS multiplier/ divider prototype with 5-bit resolution. Experimental results from a CMOS current-mode fuzzy controller chip that contains the proposed design are also included. I.-Introduction. Multiplier/divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems [1-19]. In this paper, we will focus on the application to fuzzy controllers, which are currently drawing a great attention. Typical fuzzy systems like Mamdani's or Takagi-Sugeno's types infer a crisp (not fuzzy) output by aggregating all the rules' conclusions and performing a division. One of the main problems that appears when implementing a fuzzy system in hardware is the selection of an adequate divider circuit. The divider is usually the circuit that limits the speed, precision and interface capabilities (it is the output block) of the resulting fuzzy chip [1-9]. Several techniques to design multiplier/divider circuits have been proposed in the literature. Conventional log-antilog or bipolar translinear techniques have been employed in the analog fuzzy
Proceedings of the conference on Design, automation and test in Europe, 2000
This paper proposes a methodology for designing sampled-data Mixed-Signal circuits by using VHDL-... more This paper proposes a methodology for designing sampled-data Mixed-Signal circuits by using VHDL-based behavioural descriptions. The goal is using a VHDL description of both the analog and the digital part, to simulate and verify the entire mixed-signal system, as well as to facilitate the synthesis and fault simulation of the digital part. As an example of the proposed methodology, a digitally corrected/calibrated pipeline A/D converter (ADC) has been designed. Among other aspects of general interest, we will show how analog dynamic effects are incorporated in order to obtain accurate high level simulations. Results from simulations carried out using QuickHDL in Mentor-Graphics prove the feasibility of the approach and are in agreement with those obtained experimentally from a Silicon prototype.
1991., IEEE International Sympoisum on Circuits and Systems
In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). ... more In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). The short term memory (STM) section is implemented using small transconductance four quadrant multipliers, and capacitors for the integrators. The long term memory (LTM) is built using an additional multiplier that uses locally available signals to perform Hebbian learning. The value of the learned weight is present at a capacitor for each synapse. After learning has been accomplished the value of the stored weight voltage can be refreshed using a simple AID-D/A conversion, which if done fast enough, will maintain the weight value within a discrete interval of the complete weight range. Such a discretization still allows good performance of the STM section after learning is finished.
Proceedings of the 21st annual symposium on Integrated circuits and system design, 2008
As part of a Low-IF ZigBee receiver, a 2.4GHz differential common source low noise amplifier, imp... more As part of a Low-IF ZigBee receiver, a 2.4GHz differential common source low noise amplifier, implemented in a 90nm mixed/RF 7M CMOS process and designed in moderate inversion, is presented in this work. Design methodology and simulation results from Spectre-RF simulator are presented. With 2.5V supply voltage, the LNA achieves a noise figure of 2.5dB, an IIP3 of 1dB and gain higher than 10dB, with a current consumption of 12mA. The LNA area without pads is 720µm × 710µm.
2010 IEEE 16th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), 2010
This paper presents a design methodology for the implementation of efficient and accurate sinewav... more This paper presents a design methodology for the implementation of efficient and accurate sinewave generators suitable for analog and mixed-signal BIST applications. The design guidelines are based on an analytical discussion that contemplates the main non-idealities of the generator. A full design example is presented to illustrate the proposed methodology.
IEEE Transactions on Circuits and Systems II: Express Briefs, 2015
A system for cell-culture real-time monitoring using an Oscillation-Based (OB) approach is propos... more A system for cell-culture real-time monitoring using an Oscillation-Based (OB) approach is proposed. The system transforms a Cell-Culture Under Test (CCUT) into a suitable "biological" oscillator, without needing complex circuitry for excitation and measurement. The obtained oscillation parameters are directly related to biological test, owed to an empirically extracted cell-electrode electrical model. A discrete prototype is proposed and experimental results with living cell culture are presented, achieving the expected performances.
A fuzzy microcontroller is presented implementing a simplified inference mechanism. Fuzzification... more A fuzzy microcontroller is presented implementing a simplified inference mechanism. Fuzzification, rule composition and defuzzification are carried out by means of (basically) analog current-mode CMOS circuits operating in strong inversion. Also a voltage interface is provided with the external world. Combining analog and digital techniques allow a programming capability.
Supply current monitoring for testing CMOS analog circuits
Proc. XI Conference …, 1996
... 3, No. 4, Dec. 1992, pp. 317-326. [5] IM Bell et al, "Supply current testing of ... more ... 3, No. 4, Dec. 1992, pp. 317-326. [5] IM Bell et al, "Supply current testing of mixed analog and digital ICs", Electronics Letters, Aug. 1991, pp. 1581-1583. [6] M. Roca, A. Rubio, "Self-testing CMOS operational amplifier", Electronics Letters, 1992, pp. 1452-1454. ...
Journal of Electronic Testing, 2011
This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (L... more This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized regression model based on ensemble learning is used to relate the digital signatures to the target specifications. The proposed test procedure is studied from an analytical point of view, and a demonstrator has been developed to prove the feasibility of the approach. This demonstrator features a 2.445GHz low-power LNA and a simple envelope detector, and has been
This paper reports a case study about effects produced by the radiation Single Event Transient (S... more This paper reports a case study about effects produced by the radiation Single Event Transient (SET) injection on a custom operational amplifier. SETs were injected in the operational amplifier transistors in order to evaluate their sensitivity to the radiation transient faults. The circuit was designed using a non-rad-hard AMS -CMOS 0.8µm process. In this case, simulation results allow us to identify the operational amplifier most sensitive transistors. This work will form the basis to further development of design techniques for radiation hard analog circuits.
IEEE Transactions on Fuzzy Systems, 1997
This paper discusses architectural and circuit-level aspects related to hardware realizations of ... more This paper discusses architectural and circuit-level aspects related to hardware realizations of fuzzy controllers. A brief overview on fuzzy inference methods is given focusing on chip implementation. The singleton or zero-order Sugeno's method is chosen since it offers a good tradeoff between hardware simplicity and control efficiency. The CMOS microcontroller described herein processes information in the current-domain, but input-output signals are represented as voltage to ease communications with conventional control circuitry. Programming functionalities are added by combining analog and digital techniques, giving rise to a versatile microcontroller, capable of solving different control problems. After identifying the basic component blocks, the circuits used for their implementation are discussed and compared with other alternatives. This study is illustrated with the experimental results of prototypes integrated in different CMOS technologies.
IEEE Journal of Solid-State Circuits, 1996
This paper presents mixed-signal current-mode CMOS circuits to implement programmable fuzzy contr... more This paper presents mixed-signal current-mode CMOS circuits to implement programmable fuzzy controllers that perform the singleton or zero-order Sugeno's method. Design equations to characterize these circuits are provided to explain the precision and speed that they offer. This analysis is illustrated with the experimental results of prototypes integrated in standard CMOS technologies. These tests show that an equivalent precision of 6 bits is achieved. The connection of these blocks according to a proposed architecture allows fuzzy chips with low silicon area whose inference speed is in the range of 2 Mega FLIPS (fuzzy logic inferences per second).
IEEE Design & Test of Computers, 2002
Electronics Letters, 1994
A CMOS continuous time current-mode circuit which provides the maximum of n analog inputs is pres... more A CMOS continuous time current-mode circuit which provides the maximum of n analog inputs is presented. This structure exhibits a O(n) complexity, and allows high precision and speed with small area and very low power dissipation. Its operation is discussed and illustrated with simulation results.
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Papers by Jose L. Huertas