HARI MOORTHY

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Papers by HARI MOORTHY

The mechanism of the Ser-(cis)Ser-Lys catalytic triad of peptide amidases

Physical Chemistry Chemical Physics, 2017

In this paper, we report a theoretical investigation of the catalytic mechanism of peptide amidas... more

Channel Estimation Filter Normalization

Development of Adaptive Algorithm for CFAR in non-homogenous environment

218 Abstract— Constant False Alarm Rate (CFAR) processor is commonly used detectors in radar syst... more 218 Abstract— Constant False Alarm Rate (CFAR) processor is commonly used detectors in radar system to maintain control of false alarm rate in face of local variation of background noise/clutter. Radar detection procedure involves the comparison of received signal amplitude to a threshold. The Cell Averaging approach is an adaptive procedure that adaptively sets the threshold low by estimating mean level in reference window of N range cells. In this paper, CA-CFAR algorithm is simulated and verified for real time radar detection and tracking operation using MATLAB software and represent the CFAR technique for a target through radar GUI. Beside this a comparison of different algorithm (GO-CFAR,SO-CFAR) states that Cell Averaging has the least threshold value ,which gives good probability of detection for false alarm rate of 10 to a target in non-homogenous environment.

Design of low power delay efficient Vedic multiplier using reversible gates

International Journal of Advance Research, Ideas and Innovations in Technology, 2018

In early days of computers, multiplication was implemented generally with a sequence of addition,... more In early days of computers, multiplication was implemented generally with a sequence of addition, subtraction and shift operations. There exist many algorithms proposed in the literature to perform multiplication, each offering different advantages and having the trade-off in terms of delay, circuit complexity, area occupied on-chip and power consumption. Latency is the major issue of computing a function. Simply it’s a measure of how long the inputs to a device are stable is the final result available on outputs. Throughput is the measure of how many multiplications can be performed in a given period of time. The multiplier is not only a high delay block but also a major source of power dissipation. Normal multiplication process involves generation of partial products, an addition of partial products and finally, total product is obtained. So the performance of the multiplier depends on the number of partial products and the speed of the adder. The reversible computation is one fie...

Design and Analysis of Double Precision Floating Point Division Operator Based on CORDIC Algorithm

Floating point arithmetic units provides better accuracy, precision and it covers larger data ran... more Floating point arithmetic units provides better accuracy, precision and it covers larger data ranges compared to fixed point. Designing of floating point division operator is complex compared to other data operands. In general, division operation based on CORDIC algorithm has a limitation in term of the range of inputs that can be processed by the CORDIC machine to give proper convergence and precise division operation result. This paper involves the design of Double precision floating point division operator using CORDIC algorithm. The new architecture of CORDIC Algorithm is proposed in this project which overcomes the limitation in terms of range of inputs and is capable of processing broader input ranges. The performance is evaluated for large input tests. The results show that the proposed system gives precise division operation results with broader input ranges. The proposed hardware architecture is modeled in VERILOG and synthesized on Virtex-4FPGA device (xc4vsx25). The desig...

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FPGA Implementation of ICA for mixed signal using Frog Leap Optimization Algorithm

Speech verification is a bio-metric system which performs the computing task of validating a user... more Speech verification is a bio-metric system which performs the computing task of validating a user identity using the characteristics feature extracted from their speech samples. The independent component analysis (ICA) is one of the major trending technologies to differentiate signals from their mixed quantity.ICA is one of the technique to extract a signal from a compound signal. The fundamental approach of ICA is to find a suitable representation of multivariate data. The representation is often sought as a linear transformation of the original data. Linear transformation methods include principal component analysis (PCA), factor analysis, and projection pursuit. Independent component analysis (ICA) is a recently developed method in which the goal is to find a linear representation of non-Gaussian data so that the components are statistically independent. This kind of analysis captures the essential structure of the data in many applications including feature extraction and signal...

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Highly Efficient Design of DSP Systems Using Electronic Design Automation Tool to Find Iteration Bound

Digital signal processing algorithms are repetitive in nature. These algorithms are described by ... more Digital signal processing algorithms are repetitive in nature. These algorithms are described by iterative data flow graph (DFG) where nodes represent tasks and edges represent communication. Execution of all nodes of the DFG once completes iteration. Successive iteration of any node are executive with a time displacement referred to as the iteration period. For all recursive signal processing algorithms, there exists an inherent fundamental lower bound on the iteration period referred to as the iteration period bound or the iteration period. This bound is fundamental to an algorithm and is independent of the implementation architecture. In other words it is impossible to achieve an iteration period less than the bound even when infinite processors are available to execute the recursive algorithm. Iteration bound need to be determined in rate-optimal scheduling of iterative data flow graph. The iteration bound determination has to pre-order repeatedly in the scheduling phase of the high level synthesis. In recursive constrained scheduling a given processing algorithm is scheduled to achieve the minimum iteration period using the given hardware resources. In order to execute operation of the processing algorithm in parallel, the required number of processors or functional units required to execute the operation in parallel may be larger than the number of available resources. Generally the precedence to be assigned is not unique. Hence the iteration bound should be determined for every possible precedence to check which precedence leads to the final schedule with the minimum iteration period. Consequently the iteration bound may have to be computed many times and it is important to determine the iteration bound in minimum possible time.

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