Oren E Eliezer

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The National Institute of Standards and Technology (NIST) operates radio station WWVB, which broa... more

A fully digital architecture for wideband wireless transmitters

A fully digital architecture for wideband wireless transmitters is presented, which replaces high... more A fully digital architecture for wideband wireless transmitters is presented, which replaces high dynamic- range analog circuits with high-speed digital circuits and thus offers lower cost and higher performance compared to those of conventional analog transmitters. The proposed transmitter modulates wideband data in Cartesian coordinates and generates its RF output using a fully Digital Quadrature Modulator (DQM). The novel architecture

A Demonstration Of Optical, Doppler and Thermal Sensor Fusion In A Portable Personal Safety Device

Digital RF Processor (DRP) for Mobile Phones

Digest of papers, Jun 1, 2007

AbstractRF circuits for wireless applications have recently migrated to low-cost digital nanosca... more

A Low Area and Low Power Digital Band-Pass Sigma-Delta Modulator for Wireless Transmitters

The digital sigma-delta (SigmaDelta) modulators are used extensively in CMOS wireless SoC designs... more The digital sigma-delta (SigmaDelta) modulators are used extensively in CMOS wireless SoC designs to achieve high-resolution data conversion while controlling the quantization noise spectrum. This paper presents an implementation of a 90nm CMOS digital band-pass SigmaDelta modulator, running at 900 MHz. The conventional band-pass SigmaDelta structures required to achieve such noise shaping are hardware intensive and do not meet the

A Low Power and Low Quantization Noise Digital Sigma-Delta Modulator for Wireless Transmitters

Digital sigma-delta (SigmaDelta) modulators are used extensively in CMOS wireless SoC designs to ... more Digital sigma-delta (SigmaDelta) modulators are used extensively in CMOS wireless SoC designs to achieve high-resolution data conversion while controlling the quantization noise spectrum. This paper presents an implementation of a 90nm CMOS digital low-pass SigmaDelta modulator, which has lower quantization noise and lower power consumption compared to other recent structures. A conventional digital SigmaDelta structure uses a 1-bit quantizer and

The Inter-Society Technology Panels at IMS 2022 [MTT-S Society News]

IEEE Microwave Magazine, Feb 1, 2023

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Implementation of a High Speed Digital Band-Pass Sigma-Delta Modulator for a Wireless Transmitter

Abstract Digital sigma-delta modulators are used extensively in CMOS wireless SoC designs to achi... more

Reduced bandwidth class H supply modulation for wideband RF power amplifiers

ABSTRACT Supply modulation for RF power amplifiers according to the modulated signal&#39;s en... more ABSTRACT Supply modulation for RF power amplifiers according to the modulated signal&#39;s envelope (i.e. envelope tracking and polar modulation) is an effective approach for achieving high efficiency in transmitters. Various current and emerging wireless standards produce signal envelopes with wide bandwidths and high peak-to-average ratio (PAR), which makes efficient supply modulation very challenging. In this paper, a reduced bandwidth class H supply modulation scheme is proposed, which provides efficient supply modulation with high PAR and wide bandwidth. It leverages a novel bandwidth reduction DSP algorithm to effectively exploit an efficient narrowband switching modulator without increasing its switching losses. Analyses and simulation results for LTE and WiMAX signals indicate significant modulator efficiency improvements (up to 15%) over similar existing techniques.

Feasibility study of millimeter wave CMOS automotive pulse radars

The death toll and financial loss from automotive accidents necessitate the use of automotive rad... more The death toll and financial loss from automotive accidents necessitate the use of automotive radars. However, existing commercial automotive radars are bulky and expensive, and are therefore offered only in higher-end vehicles. The advancements in CMOS technology provide a great opportunity for it to be used in the 76-81 GHz frequency band allocated to automotive radar, thereby offering a lower-cost solution. This paper addresses some of the design challenges of millimeter wave CMOS transceivers from a system level perspective, proposes a radar system, and presents simulation results for key functions in the system that were obtained in AWR Visual System Simulator (VSS). The paper also discusses the options of built in self testability of CMOS transceivers thus envisioning a complete low cost solution for automotive radars.

Built-In Measurements in Low-Cost Digital-RF Transceivers

IEICE Transactions on Electronics, 2011

Digital RF solutions have been shown to be advantageous in various design aspects, such as accura... more Digital RF solutions have been shown to be advantageous in various design aspects, such as accurate modeling, design reuse, and scaling when migrating to the next CMOS process node. Consequently, the majority of new low-cost and feature cell phones are now based on this approach. However, another equally important aspect of this approach to wireless transceiver SoC design, which is instrumental in allowing fast and low-cost productization, is in creating the inherent capability to assess performance and allow for low-cost built-in calibration and compensation, as well as characterization and final-testing. These internal capabilities can often rely solely on the SoCs existing processing resources, representing a zero cost adder, requiring only the development of the appropriate algorithms. This paper presents various examples of built-in measurements that have been demonstrated in wireless transceivers offered by Texas Instruments in recent years, based on the digital-RF processor (DRP TM) technology, and highlights the importance of the various types presented; built-in self-calibration and compensation, built-in self-characterization, and builtin self-testing (BiST). The accompanying statistical approach to the design and productization of such products is also discussed, and fundamental terms related with these, such as 'soft specifications', are defined.

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All Digital-Quadrature-Modulator Based Wideband Wireless Transmitters

IEEE Transactions on Circuits and Systems I-regular Papers, Nov 1, 2009

A novel architecture for a fully digital wideband wireless transmitter is presented. The proposed... more A novel architecture for a fully digital wideband wireless transmitter is presented. The proposed structure replaces high-dynamic-range analog circuits with high-speed digital circuits and offers a simple and flexible architecture, which requires less area, consumes less power, and delivers higher performance compared to those of the conventional modulators used for wideband systems. The design is based on a standard 65-nm

A Generalized Signal Reconstruction Method for Designing Interpolation Filters

A generalized signal reconstruction method is presented for the development of digital FIR interp... more A generalized signal reconstruction method is presented for the development of digital FIR interpolation filters, applicable to an analog reconstruction filter impulse response with finite duration that extends to an integer number of the input sampling periods. The technique produces efficient interpolation filter structures for both polynomial and non-polynomial based impulse responses, and could minimize implementation requirements (area, power) for

An EDGE transmitter with mitigation of oscillator pulling

AbstractWe propose a polar transmitter architecture that is robust to modulation-induced injecti... more

INVITED PAPER Special Section on Analog Circuits and Related SoC Integration Technologies Built-In Measurements in Low-Cost Digital-RF Transceivers

WSD: Self-interference and co-habitation considerations in complex SoC and SiP integrated solutions

With the integration of RF, mixed signal and digital building blocks on a single die, combined wi... more With the integration of RF, mixed signal and digital building blocks on a single die, combined with the trend of increased frequencies (both in the RF and in the digital circuitry), it is essential to consider various on-chip coupling effects in the early design phases of the RF SoC or SiP. Additionally, provisions should be made for mitigating the impact of peripheral interactions (e.g., package, antenna), as well as the potential for self-interference, such that these are either eliminated or can be resolved on the fabricated product without hardware redesign. The focus of this interactive workshop will be on resolving self-interference problems: on-chip coupling effects, chip-package co-design, substrate issues, coupling-aware RFIC floor planning, digitally assisted solutions for interference problems, design practices, modeling and CAD/EDA capabilities to address coupling effects. Recognized companies and partnerships active in the semiconductor industry will present actual issues encountered in their designs and the solutions/design-practices used to address them. Interactive discussions will be facilitated to exchange valuable ideas for the benefit of participants and the industry at large.

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Enhancement of Coexistence Performance in a DRP Based Multi-Radio Environment of a Mobile Phone

Abstract The incorporation of Bluetooth and Wireless LAN transceivers in a mobile device poses de... more

A methodological approach for the minimization of self-interference effects in highly integrated transceiver SoCs

2009 IEEE International Conference on Microwaves, Communications, Antennas and Electronics Systems, Nov 1, 2009

A design methodology is introduced, which is aimed at the minimization of the duration and costs ... more A design methodology is introduced, which is aimed at the minimization of the duration and costs associated with the productization of complex transceiver system-on-chip (SoC) solutions that typically exhibit self-interference problems once fabricated. Such products comprise extensive digital circuitry, mixed-signal functions, and sensitive RF blocks, creating high potential for self-interference within the SoC. The proposed design-for-interference-mitigation (DfIM) approach uses the existing on-chip processing and memory resources to effectively address these problems, thus eliminating the need for a hardware revision and saving the associated time and cost. Two implementation examples for this methodology in Digital RF Processor (DRPTM)-based wireless SoCs are shown to demonstrate the effectiveness of the approach.

Mismatch considerations in an RF-DAC design for a digital polar EDGE transmitter

Coexistence Performance Enhancement Techniques for DRP Based WLAN/WPAN and Cellular Radios Collocated in a Mobile Device

The incorporation of Bluetooth and Wireless LAN transceivers in a mobile devices poses design cha... more The incorporation of Bluetooth and Wireless LAN transceivers in a mobile devices poses design challenges associated with their coexistence with the cellular transceiver, as they often need to operate concurrently and their close proximity is inevitable. We present some recently developed techniques that transform the RF and analog circuit design complexities, typically encountered when targeting enhanced coexistence performances, into the digital domain, and demonstrate how these techniques allow the concurrent operation of two transceivers without each of them adversely impacting the performance of the other. The ideas presented have been implemented in a commercial Bluetooth single chip transceiver offered by Texas Instruments.

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