Thu Lin

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Papers by Thu Lin

A Study on Community’s Perception and Practice on the Plastic Pollution in Myanmar (Case Study: Kyee Myin Daing Township)

Plastic is as one of the most common and convenient materials in modern society. The use of plast... more Plastic is as one of the most common and convenient materials in modern society. The use of plastic is increasingly controversial, however, because of its negative impacts on the environment, biodiversity, and human health. The main purpose of the study is to examine the current status of public perception on plastic pollution and environmental conservation. It was a descriptive study based on primary data from Kyee Myin Daing Township. The survey was conducted on a total 265 respondents by using structured questionnaire. It was found that 97.4 percent of respondents concern about plastic pollution and 66.8 percent of respondent answer plastic can be treated by recycling it after using it. 54 percent of respondent answer the main reason for using plastics is easily available in the market, 81.1 percent of respondent know that the most responsible person to reduce plastic pollution is themselves. It was found that among 265 respondents, 49.4 percent are using between 4 to 6 plastic bags every day, and 87.9 percent of respondent will bring their own items instead of paying extra charge for using plastic bag, bottle, and cup, but 12.1 percent shall continue using it by paying an extra charge.

A 200-MHz CMOS x/sin(x) digital filter for compensating D/A converter frequency response distortion in high-speed communication systems

[Proceedings] GLOBECOM '90: IEEE Global Telecommunications Conference and Exhibition

... Functional verification was performed using a TOPAZ IC tester by applying pseudo-random input... more

A 200-MHZ double-sideband to single-sideband converter in 1- mu m CMOS generated by silicon compiler

The design of a 43-tap Hilbert transform digital filter chip is presented. This chip is configure... more The design of a 43-tap Hilbert transform digital filter chip is presented. This chip is configured to provide both the conversion of a double-sideband (DSB) signal to a single-sideband (SSB) signal with a factor of two sampling rate reduction and the conversion of a SSB signal to a DSB signal with a factor of two sampling rate increase. The chip was fabricated in a 1- mu m n-well CMOS process and has been verified at sample rates in excess of 200 MHz.<<ETX>>

A CMOS bit-level pipelined implementation of an FIR x/sin(x) predistortion digital filter

IEEE International Symposium on Circuits and Systems

The CMOS design and implementation of an 11-tap FIR digital filter for compensating the sin(x)/x ... more The CMOS design and implementation of an 11-tap FIR digital filter for compensating the sin(x)/x spectrum distortion introduced by D/A converters is presented. A throughput rate in excess of 100 MHz is projected using bit-level pipelining and carry-save addition. The chip complexity is approximately 14000 transistors. Circuit design issues such as clock distribution, adder and register cell design, and input

A silicon compiler for high-speed CMOS multirate FIR digital filters

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

A silicon compiler for high-speed multirate FIR (finite impulse response) digital filters is pres... more A silicon compiler for high-speed multirate FIR (finite impulse response) digital filters is presented, with application to the design of a Hilbert transformer and sampling rate converter given as an example. The compiler automates the process of designing multirate spectral shaping filters and sampling rate converters without incurring area penalties with respect to hand-crafted designs. The compiler is designed for

VLSI architectures for a high-speed tunable digital modulator/ demodulator/bandpass-filter chip set

IEEE International Symposium on Circuits and Systems, 1992

An all-digital multirate CMOS chip set architecture is presented for implementing tunable digital... more An all-digital multirate CMOS chip set architecture is presented for implementing tunable digital modulators, demodulators, and bandpass filters with a projected throughput rate of 200 Msamp/s in a 1.0-μm CMOS process. The proposed three-chip set will accommodate center frequencies up to 90 MHz and selectable bandwidths from a few kHz up to tens of MHz. The first chip consists of

A 300 MHz digital double-sideband to single-sideband converter in 1 μm CMOS

IEEE Journal of Solid-State Circuits, 1995

A 43-tap FIR Hilbert transform digital filter chip is described which implements both a double-si... more A 43-tap FIR Hilbert transform digital filter chip is described which implements both a double-sideband (DSB) to single-sideband (SSB) conversion with a decimation-by2 and the converse operation of a SSB to DSB conversion with an interpolation-by-2. Over 70 dB of image rejection is achieved by the Hilbert transform filter. The 3.57 x 7.07 nun2, 45 OOO transistor chip was fabricated in a 1 pm N-well CMOS process and operates at sample rates in excess of 300 MHz.

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Design techniques for silicon compiler implementations of high-speed FIR digital filters

IEEE Journal of Solid-State Circuits, 1996

Architecture design techniques for implementing both single-rate and multirate high throughput fi... more Architecture design techniques for implementing both single-rate and multirate high throughput finite impulse response (FIR) digital filters are explored, with an emphasis on those which are applicable to automated integrated circuit layout techniques. Various parallel architectures are examined based on the criteria of achievable throughput versus hardware complexity. Well-known techniques for reduced complexity and computation time are briefly summarized, followed by the introduction of several new techniques which offer further gains in both throughput and circuitry reduction. An architecture for mirror-symmetric polyphase filter banks is derived which exploits the coefficient symmetry between multiple filters to reduce hardware. Finally, the evolution of a silicon compiler which utilizes all of these techniques is presented, and results are given for compiled filters along with comparisons to other compiled and custom FIR filter chips.