Analog VLSI Signal Processing

An oscillator circuit which incorporates Operational Transconductance Amplifiers is presented. The circuit is designed using three OTAs and two grounded capacitors. The frequency of oscillation is tunable over a wide frequency range. The effects of the parasitic elements on the oscillation frequency and the oscillation condition are studied. The theoretical results are compared with the experimental results for a practical oscillator circuit.

This paper introduce a practical elimination of PLI (power line interference) with the frequency of 50 Hz and its 2 nd , 3 rd and 4 th harmonics using digital FIR notch filter designed by FPGA chips Which is situated on development and education board DE2-70. To realize the filtering operation a digital multiband stop filter has been designed for frequencies 50Hz, 100Hz, 150Hz,and 200Hz with high order 1500 and processing word of 10bits and frequency 1000Hz to gain attenuation of 60dB for PLI signal components. Using FPGA to design digital FIR notch filter enable as of realization parallel processing to achieve digital convolution algorithm in the real time, where 1500 operation of adding, shifting, multiplying and dividing can be done in 0.5 ms (sampling period) for digital samples of 10 bits length, this equivalent 3 million operation per second where the general processor cannot do that.

In this study, current and voltage transfer function filters using single active component, namely, current backward transconductance amplifier (CBTA) are presented. The proposed structures are a single-input three outputs (SITO) current-transfer function filter, a single-input four-output (SIFO) voltage transfer function filter and three-input single-output (TISO) voltage transfer function filter. The proposed filters have low active and passive sensitivities and use canonical number of electronics components. The validity of the proposed circuits is demonstrated by PSPICE simulations and experimental results. Operation range of the CBTA and its parasitic effects are also discussed.

Within the path of the closing multi decade, there may be a quick development being advanced of far off correspondence applications. The presentation of all such some distance flung frameworks is based totally upon the plan of the radio twine. Small scale strip radio wires are desired for more part of their programs and elements of interest. This paper shows the form and duplicate of spherical square restoration smaller scale strip reception equipment. the general reception equipment is planned and reenacted in microwave tool immoderate Frequency form Simulator (HFSS). The substrate utilized in this setup is FR4 and substrate is carried out with ε_r = 4.4. The proposed reception gadget is utilized for extraordinary far off correspondence applications. Addition, go back misfortune and information switch functionality are the exhibition parameter of proposed radio twine. The proposed recieving wire is broke down at thunderous recurrence of 4.4 GHz. the arrival misfortune is - 30.2 db ...

It has been shown in two earlier papers published from this study that corresponding to a given single-operational trans-conductance amplifier (single-OTA)-RC and dual-OTA-RC sinusoidal oscillators, there are three other structurally distinct equivalent forms having the same characteristic equation, one of which employs both grounded capacitors (GC). In this study, an earlier nullor-based theory of generating equivalent op-amp oscillator circuits, proposed by the first author, is extended to derive equivalent OTA-RC circuits which discloses the existence of an additional number of equivalent forms for the same given OTA-RC oscillators than those predicted by the quoted earlier works, and thereby considerably enlarging the set of equivalents of a given OTA-RC oscillator. Furthermore, the presented nullor-based theory of generating equivalent OTA-RC oscillators results in three additional interesting outcomes: (i) the revelation that corresponding to any given OTA-RC oscillator there are two 'both-GC' oscillators (and not merely one, as derived in the quoted earlier works); (ii) the availability of explicit current outputs in several of the derived equivalents and (iii) the realisability explicit-current-output 'quadrature oscillators' in some of the generated equivalent oscillators. The workability of the generated equivalent OTA-RC oscillators has been verified by SPICE simulations, based on CMOS OTAs using 0.18 µm CMOS technology process parameters, and some sample results are given.

This paper presents two each of voltage-mode (VM) and current-mode (CM) universal biquad filtering topologies constructed around current feedback amplifier (CFA). The VM configurations are based on lossless integrator loops. One of the CM topologies has three inputs and one output and the other with a single input and three outputs. Both the VM configurations and one of the CM circuits realize lowpass notch (LPN) and highpass notch (HPN) functions in addition to all the generic filtering functions while the other CM circuit realize three basic filtering functions simultaneously. The filter parameters are orthogonally adjustable and enjoy low sensitivity figures. The circuits have been simulated using personal computer simulation program with integrated circuit emphasis (PSPICE) and simulation results are found to be in conformity with the theoretical values.

It is shown that is not possible to realize an infinite input impedance active compensated voltage follower using two or three opamps and having compensation conditions independent of the gain bandwidth of the opamps. Several novel active compensated voltage followers using two or three opamps are proposed. The properties of the compensated voltage followers are summarized in tables. Übersicht: Es wird gezeigt, daß es nicht möglich ist, einen unendlich großen Eingangswiderstand für einen aktiv kompensierten Spannungsfolger zu realisieren, der aus zwei oder drei Operationsverstärkern besteht und der vom Verstärkungs-Bandbreite-Produkt unabhängige Kompensationseigenschaften hat. Es werden einige neue aktiv kompensierte Spannungsfolger mit zwei oder drei Operationsverstärkern vorgeschlagen. Ihre Eigenschaften sind in Tabellen zusammengefaßt.

A single-component fractional order element (FOE) is realised and its performance is compared with the conventional FOEs such as cross resistance-capacitance (RC) ladder network and domino ladder network in the analogue domain. The singlecomponent FOE is a capacitive-type probe coated with a porous film of poly-methyl-methacrylate (PMMA) and is dipped in polarisable medium. The fractional exponent of the fabricated single-component FOE and domino ladder can be varied between 0 and 1 whereas that of cross RC ladder realised in this work is 1/2. The performance of fractional order integrator (FOI) using these FOEs is studied in both frequency and time domain by simulation and experimentation. A comparative analysis of the performance of FOI is carried out.

In this paper, the implementation of a low-voltage class AB second generation voltage conveyor (VCII) with high current drive capability is presented. Simple realization and good overall performance are the main features of the proposed circuit. Proper solutions and techniques were used to achieve high signal swing and high linearity at Y, X and Z ports of VCII as well as low-voltage operation. The operation of the proposed VCII was verified through SPICE simulations based on TSMC 0.18 µm CMOS technology parameters and a supply voltage of ±0.9 V. The small signal impedance values were 973 Ω, 120 kΩ and 217 Ω at Y, X and Z ports, respectively. The maximum current at the X port was ±10 mA with maximum total harmonic distortion (THD) of 2.4% at a frequency of 1 MHz. Considering a bias current (IB) of 29 µA and output current at the X port (IX) of 10 mA, the current drive capability (IX/IB) of about 345 was achieved at the X port. The voltage swing at the Z port was (−0.4, 0.4) V. The T...

A single-component fractional order element (FOE) is realised and its performance is compared with the conventional FOEs such as cross resistance-capacitance (RC) ladder network and domino ladder network in the analogue domain. The singlecomponent FOE is a capacitive-type probe coated with a porous film of poly-methyl-methacrylate (PMMA) and is dipped in polarisable medium. The fractional exponent of the fabricated single-component FOE and domino ladder can be varied between 0 and 1 whereas that of cross RC ladder realised in this work is 1/2. The performance of fractional order integrator (FOI) using these FOEs is studied in both frequency and time domain by simulation and experimentation. A comparative analysis of the performance of FOI is carried out.

This letter introduces two new OTA-C universal Current mode biquads which offer almost all of the desirable features (expected from a good universal biquad) simultaneously, without any trade-offs. With first OTA removed and the input current source replaced by an input voltage source, both the new circuits can also realise trans-admittance-type universal biquad filters. The workability of the new circuits has been established by SPICE simulation results of their CMOS-implementable versions.

— This paper presents an optimum tuning procedure for high-order low-pass (LP) elliptic filters. Since elliptic filters are often used to satisfy very tight specifications, they often need to be tuned accurately. In this paper, we describe the tuning of one biquad, the 'tuning biquad', in a cascade of biquads. It is shown by Matlab simulations that the best choice for the tuning biquad consists of the pole pair with the highest pole Q ('maximum-Q poles') combined with the zero pair with the lowest frequency ('minimum-frequency zeros'). We also show how standard tuning procedures, such as those for the Tow-Thomas biquad, lead to excellent results. As an example, the tuning procedure is performed on a normalized seventh-order elliptic LP filter. I.

The Microstrip patch antenna plays a vital role in mobile and satellite communication due to its easy fabrication and low cost. The feed line is selected for the antenna in such a way that it must have the improved parameters like gain, Voltage standing wave ratio (VSWR) and return loss. Hence, in this paper, a low profile E-slotted microstrip patch antenna using coaxial and microstrip feed line is designed and compared for the applications of worldwide interoperability for microwave access (WI-max) to achieve improved antenna parameters. The coaxial feed line eliminates the spurious feed radiation to accomplish high gain for WI max lower frequency band than the other feed line like microstrip feed. The proposed antenna adopts the Rogers DUROID 5880 substrate to have low dielectric constant (εr = 2.2). The performance of the coaxial feedline antenna offers better parameter like return loss:-13.18db, VSWR: 1.5615 and Gain: 7.05dbat lower frequency band of WI-max application. The antenna is designed and simulated successfully using An-soft HFSS 15.0.

This study describes the design of a multiphase sinusoidal oscillator (MSO) based on log-domain filtering concept. The circuit is a direct realisation of a first-order differential equation for obtaining the inverting and non-inverting low-pass filters. Each low-pass filter comprises only a grounded capacitor and four transistors. The proposed MSO can be instantaneously controlled over a very wide frequency range by controlling the current for the oscillation frequency and oscillation condition which indicates the proposed MSO's suitability in high-frequency applications. A validated bipolar junction transistor (BJT) model is used in SPICE simulation operated from a single power supply as low as 2.5 V. The oscillation frequency is controlled over four decades of frequency. The total harmonic distortions for three phase (11.5 MHz) and four phase (7 MHz) are, respectively, obtained around 2.4 and 2.2% which enables them to be fully integrated in telecommunication systems. The power consumption is around 5.5 mW for 100 mA bias current. Moreover, experimental results of three-phase MSO are included.

This paper proposes an active pre-filter to mitigate the current harmonics generated by classical dc/dc Boost regulators, which generate current ripples proportional to the duty cycle. Therefore, high output voltage conditions, i.e., high voltage conversion ratios, produce high current harmonics that must be filtered to avoid damage or source losses. Traditionally, these current components are filtered using electrolytic capacitors, which introduce reliability problems because of their high failure rate. The solution introduced in this paper instead uses a dc/dc converter based on the parallel connection of the Boost canonical cells to filter the current ripples generated by the Boost regulator, improving the system reliability. This solution provides the additional benefits of improving the overall efficiency and the voltage conversion ratio. Finally, the solution is validated with simulations and experimental results.