Key research themes
1. How can innovative circuit architectures improve the efficiency and performance of analog-to-digital converters under hardware and power constraints?
This theme investigates novel ADC circuit designs and architectures that address limitations in speed, power consumption, integration complexity, and noise performance. It focuses on leveraging advanced hardware implementations such as time-encoding, switched-capacitor systems, and FPGA-based architectures to reduce power demands and complexity while maintaining or improving ADC accuracy and robustness, especially in high-frequency and hybrid systems.
2. How can sampling and quantization processes be jointly optimized for task-specific digital acquisition systems using learnable or adaptive frameworks?
This research area focuses on adaptive, data-driven ADC design where sampling and quantization are co-optimized in holistic systems tailored for specific tasks such as communication symbol detection or medical imaging. It addresses deficiencies of traditional uniform ADC schemes by leveraging machine learning to learn non-uniform mappings and optimize bit allocation, sampling rates, and processing pipelines end-to-end, improving overall task performance under constrained resource budgets.
3. What are effective digital and signal processing strategies to mitigate noise, mismatches, and intersymbol interference in ADC systems, especially in high-speed or constrained-resolution scenarios?
This theme covers algorithmic and signal processing methods for error correction and calibration in ADCs, focusing on mismatch compensation in time-interleaved ADC arrays, noise shaping in sigma-delta modulators, and iterative algorithms for ISI mitigation in monobit digitized ultra-wideband systems. These methods enable improved effective resolution and system-level performance despite hardware non-idealities and limitations in resolution or sampling precision.
4. How can digital filter transformations and hybrid signal processing improve digital signal conditioning and reduce artifacts in ADC outputs?
This theme investigates digital domain frequency transformations for filter design, hybrid analog-digital processing to achieve desired spectral characteristics, and methods to improve ADC output quality by addressing noise, distortion, and aliasing through filter design and implementation. It is especially relevant to high-resolution filtering stages following analog-to-digital conversion for signal enhancement and reconstruction accuracy.