Key research themes
1. How can memory and storage optimization be achieved effectively for large-scale and irregularly accessed arrays?
This research area focuses on optimizing the memory footprint and access patterns of large arrays, especially in embedded and high-performance computing systems where memory size directly impacts cost, energy consumption, and performance. The challenge lies in computing the minimum storage size needed for arrays under complex access patterns including overlapping reads/writes and irregular indexing, while keeping analysis computationally feasible. This theme is critical for designing efficient hardware-software systems and scalable array-based applications.
2. What computational strategies enable effective source enumeration and subspace estimation in array signal processing under challenging noise and sample conditions?
Source enumeration—the problem of determining the number of signal sources impinging on sensor arrays—is fundamental in array signal processing with applications in radar, communications, and seismology. This theme involves designing robust algorithms that can estimate the signal subspace dimension despite non-ideal noise (e.g., non-iid) and limited sample sizes, improving accuracy in the small-sample regime and high-dimensional settings. Approaches using subspace averaging, matrix completion, and Toeplitz structure exploitation are prominent, providing new ways to tackle traditional and modern array processing challenges.
3. How can large array computations be efficiently mapped and executed on modern high-performance hardware architectures such as GPUs and massive MIMO antenna arrays?
This research area explores efficient code generation, memory management, and algorithm design for large multidimensional array operations on hardware platforms like GPUs and massive multiple-antenna arrays. Tackling challenges like device memory limitations, the need for streaming data, gracefully handling non-uniform arrays, and reducing computational complexity, this theme aims to improve throughput and scalability for scientific, communication, and signal processing applications.