problem decomposition

Engineering design thinking is a topic of interest to STEM practitioners and researchers alike. Engineering design thinking is "a complex cognitive process" including divergence-convergence, a systems perspective, ambiguity, and collaboration (Dym, Agogino, Eris, Frey, & Leifer, 2005, p. 104). Design is often complex, involving multiple levels of interacting components within a system that may be nested within or connected to other systems. Systems thinking is an essential facet of engineering design cognition (Accreditation

The purpose of this research was to investigate the differences of using problem decomposition and problem recomposition among dyads of engineering experts, dyads of engineering seniors, and dyads of engineering freshmen. Fifty participants took part in this study. Ten were engineering design experts, 20 were engineering seniors, and 20 were engineering freshmen. Participants worked in dyads to complete an engineering design challenge within an hour. The entire design process was video and audio recorded. After the design session, members participated in a group interview. This study used protocol analysis as the methodology. Video and audio data were transcribed, segmented, and coded. Two coding systems including the FBS ontology and "levels of the problem" were used in this study. A series of statistical techniques were iv used to analyze data. Interview data and participants' design sketches also worked as supplemental data to help answer the research questions. By analyzing the quantitative and qualitative data, it was found that students used less problem decomposition and problem recomposoition than engineer experts in engineering design. This result implies that engineering education should place more importance on teaching problem decomposition and problem recomposition. Students were found to spend less cognitive effort when considering the problem as a whole and interactions between subsystems than engineer experts. In addition, students were also found to spend more cognitive effort when considering details of subsystems. These results showed that students tended to use dept-first decomposition and experts tended to use breadth-first decomposition in engineering design. The use of Function (F), Behavior (B), and Structure (S) among engineering experts, engineering seniors, and engineering freshmen was compared on three levels. Level 1 represents designers consider the problem as an integral whole, Level 2 represents designers consider interactions between subsystems, and Level 3 represents designers consider details of subsystems. The results showed that students used more S on Level 1 and 3 but they used less F on Level 1 than engineering experts. The results imply that engineering curriculum should improve the

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Multicore architectures have great potential for energy-constrained embedded systems, such as energy-harvesting wireless sensor networks. Some embedded applications, especially the real-time ones, can be modeled as imprecise computation tasks. A task is divided into a mandatory subtask that provides a baseline Quality-of-Service (QoS) and an optional subtask that refines the result to increase the QoS. Combining dynamic voltage and frequency scaling, task allocation and task adjustment, we can maximize the system QoS under real-time and energy supply constraints. However, the nonlinear and combinatorial nature of this problem makes it difficult to solve. This work first formulates a mixed-integer non-linear programming problem to concurrently carry out task-to-processor allocation, frequencyto-task assignment and optional task adjustment. We provide a mixed-integer linear programming form of this formulation without performance degradation and we propose a novel decomposition algorithm to provide an optimal solution with reduced computation time compared to state-of-the-art optimal approaches (22.6% in average). We also propose a heuristic version that has negligible computation time.

Multicore architectures have great potential for energy-constrained embedded systems, such as energy-harvesting wireless sensor networks. Some embedded applications, especially the real-time ones, can be modeled as imprecise computation tasks. A task is divided into a mandatory subtask that provides a baseline Quality-of-Service (QoS) and an optional subtask that refines the result to increase the QoS. Combining dynamic voltage and frequency scaling, task allocation and task adjustment, we can maximize the system QoS under real-time and energy supply constraints. However, the nonlinear and combinatorial nature of this problem makes it difficult to solve. This work first formulates a mixed-integer non-linear programming problem to concurrently carry out task-to-processor allocation, frequencyto-task assignment and optional task adjustment. We provide a mixed-integer linear programming form of this formulation without performance degradation and we propose a novel decomposition algorithm to provide an optimal solution with reduced computation time compared to state-of-the-art optimal approaches (22.6% in average). We also propose a heuristic version that has negligible computation time.

The examination timetabling problem (ETTP) consists in the assignment of specific dates to the exams of a set of courses assuming that the course enrollments are known. This problem is also known as post-enrollment ETTP. In this paper, we describe and solve a variant of the ETTP which has two particularities: (1) it does not assume the course enrollments as known and uses the curriculum of the degree program to evaluate potential conflicts in the exam schedules, and (2) it considers the exams and classrooms of multiple degree programs simultaneously. We refer to this variant of the ETTP as curriculum-based examination timetabling problem (CB-ETTP), a problem faced by many universities worldwide, being the Universidad Diego Portales (UDP) in Santiago of Chile one of them. To the best of our knowledge, this problem has not been described as such in the ETTP literature. We propose an approach to solve the CB-ETTP consisting of four sequential stages. The first stage B Alejandro Cataldo

Evolvable hardware (EHW) refers to selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). One of the main difficulties in using EHW to solve real-world problems is scalability, which limits the size of the circuit that may be evolved. This paper outlines a new type of decomposition strategy for EHW, the "generalized disjunction decomposition" (GDD), which allows the evolution of large circuits. The proposed method has been extensively tested, not only with multipliers and parity bit problems traditionally used in the EHW community, but also with logic circuits taken from the Microelectronics Center of North Carolina (MCNC) benchmark library and randomly generated circuits. In order to achieve statistically relevant results, each analyzed logic circuit has been evolved 100 times, and the average of these results is presented and compared with other EHW techniques. This approach is necessary because of the probabilistic nature of EA; the same logic circuit may not be solved in the same way if tested several times. The proposed method has been examined in an extrinsic EHW system using the (1 + λ) evolution strategy. The results obtained demonstrate that GDD significantly improves the evolution of logic circuits in terms of the number of generations, reduces computational time as it is able to reduce the required time for a single iteration of the EA, and enables the evolution of larger circuits never before evolved. In addition to the proposed method, a short overview of EHW systems together with the most recent applications in electrical circuit design is provided.

We show how principles of separation of Coordination from Computation can be used to endow the Problem Frames approach to problem analysis with representation schemes. These representation schemes facilitate the way evolution of requirements or of the application domain can be reflected in the decomposition structure, making it easier to change.

A large amount of research has shown the vitality of siphon enumeration in the analysis and control of deadlocks in various resource-allocation systems modeled by Petri nets (PNs). In this paper, we propose an algorithm for the enumeration of minimal siphons in PN based on problem decomposition. The proposed algorithm is an improved version of the global partitioning minimal-siphon enumeration (GPMSE) proposed by Cordone et al. (2005) in IEEE Transactions on Systems, Man, and Cybernetics—Part A: Systems and Humans, which is widely used in the literature to compute minimal siphons. The experimental results show that the proposed algorithm consumes lower computational time and memory compared with GPMSE, which becomes more evident when the size of the handled net grows.