Mark DeYong

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Puce d'integration a tres grande echelle analogique configurable numeriquement et procede pour la solution en temps reel d'equations differentielles partielles

Puce d'integration a tres grande echelle programmable et methode pour donner une solution ana... more Puce d'integration a tres grande echelle programmable et methode pour donner une solution analogique a une famille d'equations differentielles partielles que l'on rencontre generalement en calcul d'ingenierie et scientifique: l'equation de Laplace, l'equation de diffusion ou de conduction, l'equation des ondes, l'equation de Poisson, l'equation de diffusion modifiee, l'equation d'ondes modifiees, et l'equation d'ondes avec amortissement. L'invention fournit la solution en temps reel de grandes equations lineaires et non lineaires differentielles partielles bidimensionnelles et est compatible avec les systemes numeriques existants.

Board Inspection: A New Tec

The need for automated populated board inspection stems from the desire to reduce the number of d... more The need for automated populated board inspection stems from the desire to reduce the number of defective board escapes, and to improve the yield of the production line. There are two main goals of populated board inspection: 1) to detect and classify defects, 2) provide process control information. Although at first glance the goals may appear to be independent, they are actually very closely related through the technology used to perform populated board inspection. The current generation of inspection technology typically trades classification accuracy - and hence the ability to provide meaningful process control infomation - with detection ability and ease of implementation. SO while the current generation of technologies may be able to detect a wide range of anomalies on the populated board, detection is not the same as classification. Detection without robust classification will not lead to improved production yields because the infomtion needed to improve the process will not ...

Vlsi hybrid temporal neural networks for signal processing

A Hybrid Temporal Processing Element (HTPE) has been developed and implemented in VLSI circuitry.... more A Hybrid Temporal Processing Element (HTPE) has been developed and implemented in VLSI circuitry. The HTPE closely models the spatio-temporal processing of biological neurons. Asynchronous spike-like action potentials (APs) robustly transmit data between neurons, which continuously convolve relatively slow time-varying post-synaptic potentials (PSPs) induced by impinging APs. The HTPE VLSI circuitry and model functionality have been refined over five generations of models. The present model is well suited for application to temporal signal processing problems. The resulting systems provide small, high-speed solutions to complex scientific and engineering problems. This dissertation is the cumulation of four years of research into the implementation of biologically-realistic neuron models in integrated electronics. The original contributions of this work include: (1) The HTPE is the first silicon-based model of the entire neuron; pre-synaptic region, post-synaptic region, dendritic t...

Systeme et procede de reconnaissance d'image dynamique

L'invention concerne un systeme et un procede d'inspection d'objet qui comporte un pr... more L'invention concerne un systeme et un procede d'inspection d'objet qui comporte un programme de reconnaissance de l'image, stocke sur un support tangible, afin de ranger en classes et sous-classes les zones d'interet presentes sur une image. On peut utiliser ce programme de reconnaissance de l'image dans un systeme d'inspection d'image, afin de determiner les defauts presentes par des objets comme les assemblages de circuits imprimes. On peut executer ce programme de reconnaissance de l'image, en vue de recueillir des donnees d'image brutes, de segmenter l'image en zones d'interet rectangulaires qui peuvent etre des sites composants definis par des donnees CAD, traiter chaque region d'interet par changement d'echelle, realiser la correction gamma, du gain et de l'ecart, produire un groupe d'espaces d'image pour chaque region d'interet au moyen d'un ensemble de transformations d'image spatiale, produire d...

Fault detection in digital and analog circuits using an i(DD) temporal analysis technique

An i(sub DD) temporal analysis technique which is used to detect defects (faults) and fabrication... more An i(sub DD) temporal analysis technique which is used to detect defects (faults) and fabrication variations in both digital and analog IC's by pulsing the power supply rails and analyzing the temporal data obtained from the resulting transient rail currents is presented. A simple bias voltage is required for all the inputs, to excite the defects. Data from hardware tests

Multi-angle inspection of manufactured products

CMOS cells for analog VLSI Laplace equation solver based on the resistive analogy method

Midwest Symposium on Circuits and Systems, Aug 9, 1992

An analog VLSI Laplace equation solver is described. The system uses MOS transistors in ohmic mod... more An analog VLSI Laplace equation solver is described. The system uses MOS transistors in ohmic mode to simulate a resistive grid of cells similar to the resistive analogy method used for solving the Laplace equation. The VLSI circuit is a two-dimensional array of cells, each of which can be configured digitally to simulate a resistive or a boundary cell. The CMOS cell implementation and the overall system architecture are discussed.<<ETX>>

I/sub DD/ pulse response testing on analog and digital CMOS circuits

Proceedings of IEEE International Test Conference - (ITC)

This paper presents a new method for detecting defect and fabrication variations in both digital ... more This paper presents a new method for detecting defect and fabrication variations in both digital and analog CMOS circuits by simultaneously pulsing the power supply rails and analyzing the temporal and/or the spectral characteristics of the resulting transient rail currents. The method presented has a distinct advantage over other forms of iDD testing because it requires a single test vector

Real time solution of Laplace equation using analog VLSI circuits

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94

A chip to solve Laplace equation in real time using analog VLSI circuits is described. It uses MO... more A chip to solve Laplace equation in real time using analog VLSI circuits is described. It uses MOS transistors in ohmic mode to simulate a two dimensional array of resistive cells that can be configured as a programmable resistor, as an open (empty) cell or as a voltage source (boundary) cell. The cell and the overall system architecture are discussed.<<ETX>>

Light Array System and Method for Illumination of Objects Imaged by Imaging Systems

Speeding populated board inspection: a new technology

Twenty First IEEE/CPMT International Electronics Manufacturing Technology Symposium Proceedings 1997 IEMT Symposium

Asynchronous temporal neural processing element

An asynchronous temporal neural processing element. The processing element is useful in solving p... more

System and method for creating a knowledge base

System and method for performing basic training

User interface for automated optical inspection systems

System and method for dynamic image recognition

A system and method for object inspection that includes an image recognition program stored on a ... more A system and method for object inspection that includes an image recognition program stored on a tangible medium for classifying and subclassifying regions of interest on an image. The image recognition program can be used in an image inspection system to determine defects on objects such as printed wiring assemblies. The image recognition program is executable to collect raw image data, segment out rectangular regions of interest that can be component sites defined by CAD data, preprocess each region of interest by scaling, gain and offset correction, and gamma correction, generating a set of image spaces for each region of interest using a set of spatial image transforms, generating features on the image spaces, scoring the features, comparing the feature scores to a knowledge base of feature scores to make a class determination for the features, generating a presence/absence decision confidence for the features, calculating a class determination and decision confidence for each r...

Silicon Neurons for Phase and Frequency Detection and Pattern Generation

Silicon Implementation of Pulse Coded Neural Networks, 1994

Biological neurons employ rapid pulses — action potentials (APs) — for long-distance transmission... more Biological neurons employ rapid pulses — action potentials (APs) — for long-distance transmission of signals. A typical AP has a pulse width of one to a few ms and an amplitude of up to 100 mV. Cells that fire action potentials typically fire either continuously or in bursts of several APs separated by quiesent periods. Increases or decreases in activity correspond to increases or decreases in the firing frequency for continuously-firing cells, and to increases or decreases in the frequency or duration of bursts for bursting cells [Kuffler 84, Kandel 85]. Action potentials provide the advantages of relatively low-noise, lossless signal transmission typical of digital encodings of information. Nervous systems do not, however, appear to employ any standard digital encoding. The key features of communication in biological systems are timing, frequency, and phase relations between parallel streams of signals. These features are consistent with the requirements of asynchronous, data-driven computation in environments in which the temporal relations between events are usually important, and in which the system must process information and respond appropriately in times commensurate with those of relevant environmental changes.

A hybrid OTA with very wide gain adjustment range

[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems

A novel operating principle for CMOS operational transconductance amplifiers (OTAs) is presented.... more A novel operating principle for CMOS operational transconductance amplifiers (OTAs) is presented. It is referred to as the hybrid OTA since the core of the transconductor operates in weak inversion while the shell operates in strong inversion. The technique allows very wide gain adjustment range, linearity improvement, and reduced quiescent power dissipation. Experimental results from a CMOS test chip are presented that verify the operating principle.<<ETX>>

Complex and emergent behavior from neural network pulse stream filters

[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems

Simple neural systems based on biologically motivated processing elements with applications to pu... more Simple neural systems based on biologically motivated processing elements with applications to pulse stream filtering are discussed. These few node, moderately connected systems exhibit sensitive filtering capabilities, and complex and emergent information encoding properties. A single filter may operate on frequencies from the sub-hertz range up to the gigahertz range by simply adjusting the DC biases of the system. No changes in the physical structure of the system are required. Circuit level simulations of the systems are used to verify system functionality and demonstrate the basic waveforms produced by the hybrid processing element

Applications of BiCMOS composite transistors in analog circuits

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

The concept of the composite CMOS transistor reported by E. Seevinck and R.F. Waseenar (1988) is ... more The concept of the composite CMOS transistor reported by E. Seevinck and R.F. Waseenar (1988) is generalized and extended to include both composite bipolar and composite BiCMOS transistors. It is shown that a composite BiCMOS transistor is essentially equivalent to an MOS transistor. Two versions of this device are discussed: the stacked and the folded versions. Applications of the composite

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