Microcomputer display timing: Problems and solutions

Behavior Research Methods & Instrumentation 1979, Vol. 11 (6),572-576 Microcomputer display timing: Problems and solutions ADAM V. REED New School/or Social Research, New York, New York J()OO] The 525-line composite video display standard is described and discussed from the viewpoint of its usefulness in psychology experiments. While a frame is displayed every 33.3 msec, it consists of two interlaced 262.5-line subframes displayed in 16.7 msec each. Thus, a display consisting of 16 or fewer video lines may be presented in 1 msec or less. The hardware of some microcomputers may be modified to make the video vertical synchronization timing signal available to latency timing software. This modification permits response signal and latency timing with I-msec or better precision. A modification that permits display blanking under software control is also noted, and a detailed description of both modifications is given for the popular APPLE II microcomputer. Other problems discussed include moving display materials into display buffer areas in time for single-scan precision timing, software speed problems, and the tradeoffs between video and light-emitting diode displays. Although most low-cost microcomputer systems are per second; this corresponds to the 30 pairs of frames designed for game playing and other applications that do necessary to display the entire complement of 525 lines. not ordinarily require precision timing, they can provide The scan of each line proceeds from left to right and cost-effective laboratory display control. With minor slightly downward; the even- or odd-numbered lines are hardware changes and appropriate software, they can scanned in succession from the top to the bottom of equal the performance of far more expensive systems the screen. Even-numbered frame scans start at the top sold specifically for laboratory applications. Video middle of the screen and end in the bottom right-hand . displays may be used without loss of millisecond preci- corner; odd-numbered frame scans start in the top left sion, provided one is willing to: (1) learn how they corner and end in the middle of the bottom line. work, (2) perform minor modifications of the computer's Only the most expensive memory-mapped displays, electronic hardware, and (3) part with a small portion such as the MATROX high-resolution video boards of the design flexibility possible with traditional tachis- available for some microcomputer systems, use the toscopes and expensive point-plot display systems. interlace feature of the video standard. Even those If the researcher's stimuli permit the use oflight-emitting displays seldom use the full 525 lines: The MATROX diode (LED) instead of cathode-ray tube (CRT) screens, high-resolution boards, for example, use the center Requirements 2 and 3 become optional. Money for 512_ Most microcomputer video displays use 258 or LEDs and some time spent writing software are often fewer lines. (The very popular APPLE II, for example, all one needs. uses only the center 192 lines.) The same lines are out- put 60 times/sec, so that each line output by the com- AMERICAN VIDEO DISPLAY STANDARD puter actually occupies two adjacent lines in the 525- line standard. Each line in such a display moves up and Video display standards differ from country to down slightly between successive frames. A line shown country. Scan pattern and display frequency differences, for only one frame is only half as wide vertically as a as well as differences in video bandwidth and in the line shown for two frames if the video monitor beam is number of lines in the display, combine to account for perfectly focused. In practice the focus is likely to be 14 different national and regional standards. The present less than perfect, making the actual ratio of vertical discussion will apply in detail only in Canada, Japan, widths larger than the theoretical .5 to I. the United States, and other countries using the North A total of 16 video lines can be shown under this American/East Asian video standard. Researchers standard in a single millisecond. Once the modifications elsewhere should consult locally to determine locally discussed below have been made, any display less than applicable video display standards. 16 video lines high (e.g., 2 lines of text) can be presented The 525 lines of the American video standard include with better than millisecond precision. Thus, if we wish 524 whole lines (Lines 1-524) plus two half-lines: the to present a response signal with a specific time lag right half of Line 0 and the left half of Line 525. Even- after the presentation of visual information, or if we and odd-numbered lines are scanned in an interlaced wish to record in milliseconds the latency of response pattern in alternating frames. Sixty frames are presented from presentation, we can do so, provided we know Copyright 1979 Psychonomic Society, Inc. 572 0005-7878/79/060572-05$00.75/0  MICROCOMPUTERDISPLAYS 573 when the stimulus is first displayed. To know this, we MODIFICATION 2: must know with some precision where on the screen DISPLAY-BLANKING CIRCUIT the video beam is writing at any given moment. The easiest way to do this is to synchronize the experiment It is often useful, and sometimes essential, to be able control program with the videoscan. to suppress the display of all or part of a screen without changing the content of display memory. Fortunately, MODIFICATION 1: a display-blanking circuit may be built for almost any VERTICAL SYNCH MONITORING CIRCUIT microcomputer system with digital outputs. The dots composing the video display are usually kept in register The composite video signal that the computer feeds by means of a clocked circuit, such as a 7474 or equiva- into the video monitor is composed of brightness pulses, lent Type D flip-flop, or a 7496 or equivalent shift which are positive with respect to baseline, and synchro- register. Such circuits tend to have "ENABLE/CLEAR" nization ("synch") pulses, which are negative-going. input lines (e.g., Pin 1 on a 7474 flip-flop A or Pin 16 The synch pulses are of two kinds, wide for vertical on a 7496). When this line is high, the circuit operates synch and narrow for horizontal synch. The vertical normally; when it is low, the output of the clocked synch pulse occurs between display frames, and the time circuit is held at zero. Input is normally pulled up to at which any point on the screen is displayed can be +5 V on board. A blanking circuit may be implemented readily calculated relative to that pulse. The size of by disconnecting this line from +5 V and connecting it these pulses is about 1 V, which is too low to activate to a software-controlled digital output line. most digital sensing circuits. Fortunately for the experi- On the APPLE II, this modification may be imple- menter, the synch pulses are generated digitally in the mented by tying Output Line AN#3, at Pin 12 of 114, microcomputer before being combined with video to Pin 1 of the 74LS74 at BIO. The wire-wrap socket information to form composite video. In general, it is technique used for Modification 1 may be used, with not a good idea to try to sense the digital vertical synch one change: After the wire-wrap connection to Pin 1 pulse directly: The composite video signal is generated of the BIO wire-wrap socket is made, the pin must be by a delicately balanced resistor network, and any load cut to half its original length, to disconnect it from the on an input into that network may affect its balance. on-board +5-V pull-up. However, the timing for the vertical synch pulse is also generated internally, and this timing signal may be DISPLAY MEMORY ACCESS HARDWARE sensed without affecting the balance of the composite video signal. Three types of access to display memory have been Thus, the one hardware modification necessary to used in microcomputer display hardware: serial, register, use any popular microcomputer in the psychology and direct memory mapping. laboratory is to connect the vertical synch pulse timing signal to one of the sense lines that can be tested from Serial Access software. The first step is to identify the vertical synch Early microcomputer displays used the serial access pulse timing signal in the microcomputer's circuit method, and some display boards of this type are still diagram. In the APPLE II this signal is called V4, and it being sold to unwary users. The problem with serial is available to Pin 12 of the integrated circuit (IC) (current loop or RS232) access is speed, or rather, the socket at D11 and at Pin 10 ofIC socket Bl1. Of the lack of speed. The XITEX SCT-lOO, a typical serially three digital sense switches available to the user, SWO accessed board, can change displayed characters at a and SWI are normally assigned to subject-response maximum rate of 30 characters/sec (300 baud). That buttons, leaving SW2 at Pin 4 of socket 114 for sensing means one character per two videoscans. Changing a the vertical synch timing signal. Multiplexed encoding full screen takes more than 30 sec. Even the fastest of this signal with subject-response buttons should be serial board, the MATROX MTX with serial interface, avoided, since a spurious code is produced whenever can change characters only at a rate of 9,600 baud vertical synch and a response overlap in time. The (i.e., 16 characters/scan). Few of the serially accessed connection is best implemented by wire wrapping a boards have more than one display page; those that connecting lead to the appropriate pins of two wire- do provide external access only to the page that is wrap sockets. The IC at Bll and the connector at 114 currently being displayed. are then removed, and the connected wire-wrap sockets A blanking circuit is essential when serially accessed are inserted in the on-board sockets of the APPLE II. displays are used in psychological experiments. The Then the IC at Bll and the connector at 114 are plugged slower boards, such as the XITEX SCT·lOO, may only into the wire-wrap sockets. The signal connection at be used for those experiments in which masking or B11 rather than the one at D11 is used to avoid incom- other rapid succession of multiline displayed material patibility with plug-in peripheral boards. is not required. For typical experiments on memory 574 REED or decision making, the single-display screen may be in an alphanumeric or low-resolution graphic display and filled while blanked out, then unblanked from one every group of dots in a high-resolution graphic display videoscan to the next. This procedure controls stimulus can be directly addressed by the processor as 1 byte onset time, and the screen may be blanked again at in its working memory space. With this technology it stimulus offset. True control of stimulus duration, via is possible to transfer from one-third to a whole screen masking, can only be achieved for one-line displays. In of alphanumeric or graphic information from a "ghost" this application, the mask is placed on the line below location into the display area between one screen scan the to-be-masked stimulus ahead of time, and the and the next. The same can be done with up to one- cursor is moved to the bottom of the screen. The blank- eighth of a dot-oriented high-resolution screen. Actual ing circuit is used to display only a part of the screen, performance depends on the method of sharing the including the stimulus line but not the mask. A pre- memory between the display and the processor. Four cisely timed line-feed character causes the display to common methods are timesharing, multiplexing, cycle scroll at the desired time, placing the mask where the stealing, and mutually transparent access. stimulus used to be, from one scan to the next. The blanking circuit is then used to display the mask but not Timesharing the old stimulus line, which is then the next line up. Timesharing, used in the minimum-cost PIAl display The above technique may be used to mask larger board for the minimum-cost KIM-l microcomputer, displays on faster serial boards. On the serially inter- employs the processor for display control. Thus, the faced MATROXMTX, displays as large as 12 microprocessor is timeshared between display control 80-character lines may be masked by scrolling from one and other operations, such as changing the content of scan to the next. Serially interfaced boards with multiple- display memory. The latter can be performed only display screens in memory may have all of the displays during horizontal and vertical retrace parts of the loaded while the screen is blanked, thus permitting videoscan cycle: about 40% of the time. This means full-screen masking. that only one-third of a character-oriented screen can Serially interfaced video boards are sometimes be changed from one videoscan to the next. bought by mistake. Computer salesmen have been known to tell customers that the XITEX SCT-IOO is Multiplexing an S-IOO plug-in, and customers have bought the board Multiplexing, used in the Commodore PET and believing that its video memory is directly addressable, CBM 2001 series microcomputers, outputs the display via the S-IOO bus, by their microprocessors. The SCT- memory to the screen whenever that memory is not 100 does plug into the S-IOO connector, but the only being accessed by the processor. If display memory is SolDO lines from which it can receive anything are those accessed at times other than the retrace sections of the carrying unregulated de power. videoscan cycle, the display blinks perceptibly. However, the processor is available for operations other than Register Access display memory access during the display portions of This method is used in most plug-in graphic boards, the video cycle. If a display-blanking circuit is installed, including XEDAX GRAPHIC and MATROX 256 and up to two-thirds of a character-oriented screen may be 512 series. Although advertised as "videorarns," the transferred into the display area from one scan to the display memories of those boards are not directly next. addressable by the processor. Instead, the display memory is accessed through three memory locations Cycle Stealing that serve as registers. To change a dot on the screen, Cycle stealing, used in microcomputer systems with it is necessary to place its x location in one register, processors operating at speeds above 2 MHz, means that its y location in a second, and the direction of the display operations are performed during alternate desired change (on or off) in a third. Only then does the processor cycles. Display operations take place while the desired change take place. A direct memory-mapped processor is placed in a special state that suspends high-resolution graphic .display, such as the one incor- memory access ("wait") while permitting other opera- porated into the APPLE II, can change up to seven tions internal to the processor. The advantage of this display dots with a single memory storage operation. method is that the processor cannot interfere with A microcomputer system with a register access display display operations while operating almost normally. board needs 21 storage operations to do as much. The disadvantage is the almost: Display operations may While actual performance depends on processor speed cause unpredictable perturbations in the speed of and instruction set, it makes sense to calculate the program execution. number of dots a board can change in the 16 msec between scans before deciding to buy it. Transparent Access Transparent access, the technique used in MATROX Direct Memory Mapping alphanumeric video RAM boards and in the APPLE II Direct memory mapping means that every character built-in video system, is a recent innovation made  MICROCOMPUTER DISPLAYS 575 possible by very high-speed memory chips. In this replacing the content of Display Page 1 locations that technique, each processor cycle is split into two memory have already been scanned. Another 16 msec can be access cycles, one of which can be used only by the added by continuing with the last part of the transfer processor and the other, only by the display circuitry. after switching back from Display Page 2 to Page 1. With this technique, the processor functions as though We need only make sure that the scan process does not the display were not there, and vice versa. Transparent catch up with us before the transfer is completed. access permits the transfer of a whole screen of char- Thus, even if a decision is made to transfer a whole acter information from a ghost area into a display area page, there are 48 msec to do it in. We may also decide from one videoscan to the next. As long as display to transfer only those locations in which the content of durations in multiples of 16.7 msec are acceptable, a the ghost page with the mask frame and of Display microcomputer with transparent access video can serve Page 1 with the empty frame differ. This takes less time as a whole-screen n-field tachistoscope, with n limited than transferring the whole page. only by the total amount of memory installed in the Some microcomputers have only one valid display system. page origin. In these computers, a two-scan display Transparent access video displays seem almost per- duration requires that a page be transferred, even in two fectly suited for most psychological experimentation, pieces, in 33 msec or less; a single-scan display would and now that they are available in relatively low-cost require 24-msec page transfer. These times seem quite systems, it makes little sense for a psychological labora- adequate until one remembers that displays take up a tory to buy any other kind. For this reason, the dis- lot of memory space. A typical text or low-resolution cussion of software problems below is oriented primarily display page might contain 1K (1,024) bytes of memory. toward displays of this type. A high-resolution display page in the APPLE II contains 8K bytes. Thus, even the transfer of only the central DISPLAY SOFTWARE one-eighth of a page means transferring IK bytes. If the MOVE routine of the computer's monitor-in-ROM Consider, as an example, the following display is used for this transfer, it takes over 50 msec. Indeed, sequence: The original content of the screen, a fixation using monitor routines or an interpreted language such frame, is replaced by a frame containing a word, which as BASIC is totally out of the question when milli- stays on for two scans (33.3 msec) and then is replaced seconds count. Linear assembler code must be written, by a mask. The job is easiest on microcomputers in and it must exploit every available feature of the micro- which the segment of memory being displayed, or processor at the experimenter's disposal. The 6502, display page, may start in any of several locations in for example, incorporates powerful addressing modes the computer's memory. Before the trial, the fixation that can be used far real-time operations. A table of frame, the frame with the word, and the frame with the source and destination base addresses for each line can mask are placed in three of the available display pages. be set up ahead of time, and then the indirect indexed When we wish to display the word, we wait for the addressing mode can be used to transfer blocks of next vertical synch pulse, or its timing signal, and then data. When this is done, a IK-byte transfer can be place the origin of the word display page in the "current performed in less than 14 msec. display page origin" register. We then wait for the second onset of the vertical synch signal, which occurs LED DISPLAYS 33.3 msec later, and place the value of the mask page origin in that register. When display durations must be graded in increments The job is somewhat more difficult in microcomputers finer than the 16.7 msec mandated by video monitors, with only two valid display pages. Thus, if we start microcomputers may be interfaced to LED displays. with the blank frame in Display Page 1 (currently being Some of the least expensive microcomputers, such as displayed) and the word frame in Display Page 2, the the KIM, SYM, and the AIM.65, incorporate LEOs in mask frame will have to reside in a "ghost" page else- their designs as sold. LEOs are fast: They can be switched where in memory. As before, we wait for a vertical on or off in a fraction of a microsecond. They are synch pulse and then switch the display from Display limited in the variety of displays they can generate, Page 1 to Display Page 2. We now have 33 msec in which since the KIM and the SYM each have six-character to transfer the mask frame from its ghost display page eight-segment displays capable of generating numbers into Display Page I. and a few of the letters. The AIM-65 has a 20-character If the word is to be shown for only one scan, we display capable of showing numbers, uppercase letters, would have 16 msec for the transfer to be done in one and even some symbols. Larger and more flexible piece. Another 16 msec could be added to these times displays can be built and readily interfaced to micro- by beginning the transfer earlier: Soon after the begin- computers, but such displays are expensive. An eight- ning of the last scan of the empty frame, we can begin character LED module capable of displaying upper- 576 REED and lowercase characters currently sells for about $40. into a .S-msec loop when displaying each digit, and the Thus, the LED equivalent of three 40-character lines, complete six-digit display takes nearly 4 msec. But the the maximum displayable in under 1.5 msec on a video experimenter who writes her or his own software can monitor, costs $600, the price of four video monitors. certainly enjoy the convenience of computer control As far as timing is concerned, the only possible trap without sacrificing exact timing essential for reliable for the LED user is the monitor software supplied in experimentation. ROM with LED-based microcomputers. Although the LEOs themselves are fast, the software often is not. (Received for publication May 11, 1979; The monitor software on the KIM, for example, goes revision accepted September 29,1979.)