Network Routing

Floorplanning is a crucial phase in VLSI Physical Design. The subsequent placement and routing of the cells/modules are coupled very closely with the quality of the floorplan. A widely used technique for floorplanning is Simulated Annealing. It gives very good floorplanning results but has major limitation in terms of running time. For more than tens of modules Simulated Annealing is not practical. Floorplanning forms the core of many synthesis applications. Designers need faster prediction of system metrics to quickly evaluate the effects of design changes. Early prediction of metrics is imperative for estimating timing and routability. In this work we propose a constructive technique for predicting floorplan metrics. We show how to modify the existing top-down partitioning based floorplanning to obtain a fast and accurate floorplan prediction. The prediction gets better as number of modules and flexibility in their shapes increases. We also explore the applicability of traditional Sizing Theorem when combining two modules based on their sizes and interconnecting wirelength. Experimental results show that our prediction algorithm can predict the area/length cost function normally within 5-10% of the results obtained by Simulated Annealing and is, on the average, thousand times faster.

A generalisation of the conventional stochastic user equilibrium (SUE) model is developed in order to represent day-to-day variability in traffic flows due to stochastic variation in a) the inter-zonal trip demand matrix, and b) the route choice proportions conditional on the demands. The equilibrated variables in this new problem are the link flow means and covariance matrix. A heuristic solution algorithm is proposed, based on the solution of a sequence of SUE subproblems. Numerical results are reported from the application of this technique to the Sioux Falls network, and to a second larger network, under the assumption of probit-based choice probabilities. In the Sioux Falls network, a significant impact on mean link flows is observed, and is attributed to a "second order" effect, caused by a large number of small re-routings away from the links whose expected cost is most sensitive to link flow variability. Further investigation reveals that this effect is primarily due to b) above, namely variability in the route choice proportions.

Network on Chip (NoC) is a new paradigm to make the interconnections inside a System on Chip (SoC). By the developments achieved in integrated circuits (IC) manufacturing there have been attempts to design vast amounts of network on the chips in order to achieve more efficient and optimized chips. A better routing algorithm can enhance the performance of NoC. XY routing algorithm is a distributed deterministic algorithm. Odd-Even (OE) routing algorithm is distributed adaptive routing algorithm with deadlock-free ability. Every NoC should satisfy some performance requirements like low latency, high throughput and low network power. Here we demonstrated the impact of traffic load variations on average latency, average throughput and total network power for two routing algorithms XY and OE on a 3x3 2-dimensional mesh topology. The simulations have been performed on NIRGAM NoC simulator version 2.1 for constant bit rate (CBR) traffic condition. The simulation results contains overall average latency (clock cycles per packet), average throughput (in Gbps) and total network power (in mW). Performance metrics (P) is calculated for both routing algorithms and compared.

Entering the information era, the current needs of the global community is increasing very rapidly. Vehicular Ad-hoc Networks (VANET) has drawn significant attention from both industry and academia as an important development of vehicular communication technology. VANET is one of open network and communication media without security mechanism. There are many kinds of security threat that can interrupt data communication in VANET. Wormhole attacks as one of security threat can be a good challenge in VANET security research. In this paper, we evaluate the performance of the reactive routing protocol on VANET with wormhole attack scheme. The project is simulated using NS-3 in Ubuntu platform with performance analysis of routing protocol by changing initial power and node density. We conclude that throughput values are increasing along with the changing of initial power while the delay values are decreasing rapidly. By the changing of node density, the highest delay value is 0.122 ns on 10 nodes condition and 0.215 Mbps for throughput value on 8 nodes condition.

A novel low-power reconfigurable FFT processor is proposed in this paper. The architecture is served as a scalable IP Core which is suitable for System on Chip applications. The system can be configured as from 16-point to 1024-point FFT. Flexibility is added to address generation block, coefficient memory block and data memory block. Two switch blocks are implemented to route data and addresses to the right memory blocks. Compared with a conventional ASIC FFT processor, this FFT processor is characterized by having reconfigurability; compared with a FFT processor which is mapped onto a general purpose reconfigurable architecture, it has lowerpower and smaller area consumption. I.

Since the emergence of 3G cellular IP networks, internet usage via 3G data services has become ubiquitous. Therefore such network is an important target for imposters who can disrupt the internet services by attacking the network core, thereby causing significant revenue losses to mobile operators. GPRS Tunneling Protocol GT P is the primary protocol used between the 3G core network nodes. In this paper, we present the design of a multi-layer framework to detect fuzzing attacks targeted to GTP control (GTP-C) packets. The framework analyzes each type of GTP-C packet separately for feature extraction, by implementing a Markov state space model at the Gn interface of the 3G core network. The Multi-layered architecture utilizes standard data mining algorithms for classification. Our analysis is based on real world network traffic collected at the Gn interface. The analysis results show that for only 5% fuzzing introduced in a packet with average size of 85 bytes, the framework detects fuzzing in GTP-C packets with 99.9% detection accuracy and 0.01% false alarm rate.

Interconnect Planning is fast becoming an important design issue for large FPGA based designs. The fundamental requirement for interconnect planning is the ability to estimate the routing requirements of a given design. Many estimation methods for uniform island-style FPGA architectures have been reported. However, no estimation method targets the problem of estimating the interconnect requirements for timing driven physical design. Most estimation methods assume minimum cost routing, which underestimates the interconnect resource requirements when timing is of main concern. Timing driven physical design typically involves minimum delay routing which demands extra interconnects as compared to minimum-cost routing. In this paper, we propose a new method to estimate the interconnect requirements of placed FPGA circuits, under timing driven domains. We compare our estimates with the detailed routing results produced by standard routing tools in the VPR [1] design suite.

For the development and evaluation of CADtools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable characteristic parameters is required. Observing the lack of industrial benchmark circuits available for use in evaluation tools, one could consider to actually generate synthetic circuits. In this paper, we extend a graph-based benchmark generation method to include functional information. The use of a user-specified component library, together with the restriction that no combinational loops are introduced, now broadens the scope to timing-driven and logic optimizer applications. Experiments show that the resemblance between the characteristic Rent curve and the net degree distribution of real versus synthetic benchmark circuits is hardly influenced by the suggested extensions and that the resulting circuits are more realistic than before. An indirect validation verifies that existing partitioning programs have comparable behavior for both real and synthetic circuits. The problems of accounting for timing-aware characteristics in synthetic benchmarks are addressed in detail and suggestions for extensions are included.

One of the many problems that are considered to be NP-Hard is the Multiple Sequence Alignment one that initially requires, as for any other of its siblings, a specific encoding schema and design of the main functionalities of the heuristics algorithm being implemented and executed. This paper intends to discuss our proposed generic implementation of the Simulated Annealing, inspired for the procedure of cooling and shaping methods of metals. In our algorithm, we attempted to add some executions tracing functionalities in order to help later analysis for initial parameters tuning. On another hand, we also tried to get closer in our attempt to mimic the cooling of metals, but giving it an option to run under different cooling schedules. We proposed a few schedules that seemed to be studied and/or used in many algorithm implementations.

In communication networks, such as the Internet or mobile ad-hoc networks, the actions taken by intermediate nodes or links are typically hidden from the communicating endpoints; all the endpoints can observe is whether or not the end-to-end transmission was successful. Therefore, in the absence of incentives to the contrary, rational (i.e., selfish) intermediaries may choose to forward messages at a low priority or simply not forward messages at all. Using a principal-agent model, we show how the hidden-action problem can be overcome through appropriate design of contracts in both the direct (the endpoints contract with each individual router directly) and the recursive (each router contracts with the next downstream router) cases. We further show that, depending on the network topology, perhop or per-path monitoring may not necessarily improve the utility of the principal or the social welfare of the system.

Floorplanning is a a pivotal phase in Very Large-Scale Integration (VLSI) design that significantly impacts performance, cost, manufacturability, and power efficiency. Traditional optimization methods such as Simulated Annealing, Genetic Algorithms, and analytical approaches perform adequately but face scalability challenges in largescale designs with millions of netlists. This work proposes an end-to-end Reinforcement Learning (RL)-based floorplanning framework tailored for large VLSI architectures. The problem is formulated as a Markov Decision Process (MDP), where an RL agent sequentially places macros and standard cells to jointly optimize area utilization and wirelength under design constraints. A deep neural network encodes placement states and learns an optimal policy through reward functions balancing area efficiency and interconnection minimization. Experimental results on benchmark circuits show up to 18% area reduction and 24% wirelength improvement compared to heuristic baselines.

Floorplanning is a a pivotal phase in Very Large-Scale Integration (VLSI) design that significantly impacts performance, cost, manufacturability, and power efficiency. Traditional optimization methods such as Simulated Annealing, Genetic Algorithms, and analytical approaches perform adequately but face scalability challenges in large-scale designs with millions of netlists.
This work proposes an end-to-end Reinforcement Learning (RL)-based floorplanning framework tailored for large VLSI architectures. The problem is formulated as a Markov Decision Process (MDP), where an RL agent sequentially places macros and standard cells to jointly optimize area utilization and wirelength under design constraints.
A deep neural network encodes placement states and learns an optimal policy through reward functions balancing area efficiency and interconnection minimization. Experimental results on benchmark circuits show up to 18% area reduction and 24% wirelength improvement compared to heuristic baselines.
The proposed approach demonstrates the potential of learning-based optimization for physical design, enabling scalable and adaptive solutions within modern Electronic Design Automation (EDA) workflows.

We report on a search for a phase transition from ordinary nuclear matter to a state of deconfined quarks and gluons as predicted by lattice QCD calculations. A new measurement of charmonium production in Pb-Pb interactions at 158 GeV/c per nucleon agrees with our previous results and confirms the anomalous J/ψ suppression we had already observed on a significantly smaller

Placement migration is the movement of cells within an existing placement to address a variety of post-placement design closure issues, such as timing, routing congestion, signal integrity, and heat distribution. To fix a design problem, one would like to perturb the design as little as possible while preserving the integrity of the original placement. This work presents a new diffusion-based placement method based on a discrete approximation to a closedform solution of the continuous diffusion equation. It has the advantage of smooth spreading, which helps preserve neighborhood characteristics of the original placement. Applying this technique to placement legalization demonstrates significant improvements in wire length and timing compared to other commonly used techniques.

This paper describes two exact algorithms for the joint problem of object placement and request routing in a content distribution network (CDN). A CDN is a technology used to efficiently distribute electronic content throughout an existing Internet Protocol network. The problem consists of replicating content on the proxy servers and routing the requests for the content to a suitable proxy server in a CDN such that the total cost of distribution is minimized. An upper bound on end-to-end object transfer time is also taken into account. The problem is formulated as a nonlinear integer programming formulation which is linearized in three different ways. Two algorithms, one based on Benders decomposition and the other based on Lagrangean relaxation and decomposition, are described for the solution of the problem. Computational experiments are conducted by comparing the proposed linearizations and the two algorithms on randomly generated Internet topologies.

An identity system based secure overlay for the Internet is presented. This includes a primary root-of-trust in self-certifying identifiers. It presents a formalism for Autonomic Identifiers (AIDs) and Autonomic Namespaces (ANs). They are part of an Autonomic Identity System (AIS). This system uses the design principle of minimally sufficient means to provide a candidate trust spanning layer for the internet. Associated with this system is a decentralized key management infrastructure (DKMI). The primary root-of-trust are self-certifying identifiers that are strongly bound at issuance to a cryptographic signing (public, private) key-pair. These are selfcontained until/unless control needs to be transferred to a new key-pair. In that event an append only chained key-event log of signed transfer statements provides end verifiable control provenance. This makes intervening operational infrastructure replaceable because the event logs may be served up by any infrastructure including ambient infrastructure. End verifiable logs on ambient infrastructure enables ambient verifiability (verifiable by anyone, anywhere, at anytime). The primary key management operation is key rotation (transference) via a novel key pre-rotation scheme. Two primary trust modalities motivated the design, these are a direct (one-to-one) mode and an indirect (one-to-any) mode. The indirect mode depends on witnessed key event receipt logs (KERL) as a secondary root-of-trust for validating events. This gives rise to the acronym KERI for key event receipt infrastructure. In the direct mode, the identity controller establishes control via verified signatures of the controlling key-pair. The indirect mode extends that trust basis with witnessed key event receipt logs (KERL) for validating events. The security and accountability guarantees of indirect mode are provided by KA 2 CE or KERI's Agreement Algorithm for Control Establishment among a set of witnesses. The KA 2 CE approach may be much more performant and scalable than more complex approaches that depend on a total ordering distributed consensus ledger. Nevertheless KERI may employ a distributed consensus ledger when other considerations make it the best choice. The KERI approach to DKMI allows more granular composition. Moreover, because KERI is event streamed it enables DKMI that operates in-stride with data events streaming applications such as web 3.0, IoT, and others where performance and scalability are more important. The core KERI engine is identifier independent. This makes KERI a candidate for a universal portable DKMI.

This paper presents a bio-inspired distributed attention architecture designed to investigate whether selective activation and overload resistance could enable the emergence of stable internal cognitive dynamics in synthetic systems. Drawing inspiration from eusocial insect coordination, the architecture employs multiple semi-autonomous Sub-Cognitive Units (SCUs) that emit low-bandwidth salience signals while deferring high-cost computation unless selected by a global gating mechanism. The system was developed to explore whether sparse attention routing could act as a catalyst for cognition by preventing global saturation and enabling sustained internal differentiation. While the architecture demonstrates strong stability, scalability, and adaptive focus shifting, later work shows that such mechanisms alone do not produce cognition in the absence of irreversible memory and persistent internal constraint. As such, this architecture is best understood as a foundational stability layer rather than a cognitive system.

In a multi-hop wireless network, each node is able to send a message to all of its neighbors that are located within its transmission radius. In a flooding task, a source sends the same message to all the network. Routing problem deals with finding a route between a source and a destination. In the activity-scheduling problem, each node decides between active or passive state. We present a scheme whose goal is to prolong network life while preserving connectivity. Each node is either active or has an active neighbor node. Routing and broadcasting are restricted to active nodes that create such dominating set. Activity status is periodically updated during a short transition period. The main contribution of this article is to propose new metrics for previously studied sourceindependent localized dominating sets, based on combinations of node degrees and remaining energy levels, for deciding activity status.