The Volt Post

𝐌𝐨𝐧𝐭𝐚𝐠𝐞 𝐓𝐞𝐜𝐡𝐧𝐨𝐥𝐨𝐠𝐲’𝐬 𝐭𝐫𝐢𝐚𝐥 𝐩𝐫𝐨𝐝𝐮𝐜𝐭𝐢𝐨𝐧 𝐨𝐟 𝐢𝐭𝐬 𝐂𝐗𝐋 3.2 𝐌𝐗𝐂 𝐜𝐡𝐢𝐩 𝐢𝐬 𝐦𝐨𝐫𝐞 𝐭𝐡𝐚𝐧 𝐚 𝐩𝐫𝐨𝐝𝐮𝐜𝐭 𝐦𝐢𝐥𝐞𝐬𝐭𝐨𝐧𝐞. As data centers push for higher bandwidth, lower latency, and more efficient memory architectures, CXL is moving from promising standard to real-world deployment. 𝐓𝐡𝐢𝐬 𝐝𝐞𝐯𝐞𝐥𝐨𝐩𝐦𝐞𝐧𝐭 𝐩𝐨𝐢𝐧𝐭𝐬 𝐭𝐨 𝐭𝐡𝐫𝐞𝐞 𝐛𝐢𝐠 𝐬𝐡𝐢𝐟𝐭𝐬: - Faster adoption of composable infrastructure. - Stronger momentum for memory disaggregation. - A clearer path toward scalable, next-gen data center design. “The trial production of the CXL 3.2 Memory eXpander Controller (MXC) chip marks an important milestone in Montage Technology’s pursuit of CXL innovation and commercialization,” 𝐬𝐚𝐢𝐝 𝐒𝐭𝐞𝐩𝐡𝐞𝐧 𝐓𝐚𝐢, 𝐏𝐫𝐞𝐬𝐢𝐝𝐞𝐧𝐭 𝐚𝐭 𝐌𝐨𝐧𝐭𝐚𝐠𝐞 𝐓𝐞𝐜𝐡𝐧𝐨𝐥𝐨𝐠𝐲. #CXL #Semiconductors #DataCenter #MemoryArchitecture #AIInfrastructure #ChipDesign #CloudComputing #ElectronicsManufacturing Montage Technology, Inc CXL Consortium Intel AMD NVIDIA Broadcom #CXL #Semiconductors #DataCenters #AIInfrastructure #ChipInnovation 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/gf6Gq67R

𝐍𝐗𝐏 𝐦𝐚𝐲 𝐛𝐞 𝐠𝐞𝐚𝐫𝐢𝐧𝐠 𝐮𝐩 𝐟𝐨𝐫 𝐚 𝐦𝐚𝐣𝐨𝐫 𝐀𝐈 𝐩𝐥𝐚𝐲 𝐢𝐧 𝐚𝐮𝐭𝐨𝐦𝐨𝐭𝐢𝐯𝐞. The Dutch semiconductor giant is reportedly in talks to acquire Ambarella, a move that could significantly strengthen its position in edge AI and vision processing for next-generation vehicles. 𝐀𝐦𝐛𝐚𝐫𝐞𝐥𝐥𝐚’𝐬 𝐞𝐱𝐩𝐞𝐫𝐭𝐢𝐬𝐞 𝐢𝐧 𝐀𝐈-𝐩𝐨𝐰𝐞𝐫𝐞𝐝 𝐢𝐦𝐚𝐠𝐢𝐧𝐠 𝐜𝐡𝐢𝐩𝐬, 𝐚𝐥𝐫𝐞𝐚𝐝𝐲 𝐮𝐬𝐞𝐝 𝐢𝐧 𝐬𝐞𝐜𝐮𝐫𝐢𝐭𝐲 𝐬𝐲𝐬𝐭𝐞𝐦𝐬 𝐚𝐧𝐝 𝐚𝐮𝐭𝐨𝐧𝐨𝐦𝐨𝐮𝐬 𝐝𝐫𝐢𝐯𝐢𝐧𝐠 𝐬𝐭𝐚𝐜𝐤𝐬, 𝐜𝐨𝐦𝐩𝐥𝐞𝐦𝐞𝐧𝐭𝐬 𝐍𝐗𝐏’𝐬 𝐝𝐞𝐞𝐩-𝐫𝐨𝐨𝐭𝐞𝐝 𝐩𝐫𝐞𝐬𝐞𝐧𝐜𝐞 𝐚𝐜𝐫𝐨𝐬𝐬 𝐠𝐥𝐨𝐛𝐚𝐥 𝐚𝐮𝐭𝐨𝐦𝐚𝐤𝐞𝐫𝐬 𝐚𝐧𝐝 𝐓𝐢𝐞𝐫-1 𝐬𝐮𝐩𝐩𝐥𝐢𝐞𝐫𝐬. 𝐈𝐟 𝐭𝐡𝐞 𝐝𝐞𝐚𝐥 𝐠𝐨𝐞𝐬 𝐭𝐡𝐫𝐨𝐮𝐠𝐡, 𝐢𝐭 𝐜𝐨𝐮𝐥𝐝 𝐟𝐚𝐬𝐭-𝐭𝐫𝐚𝐜𝐤 𝐭𝐡𝐞 𝐝𝐞𝐩𝐥𝐨𝐲𝐦𝐞𝐧𝐭 𝐨𝐟 𝐚𝐝𝐯𝐚𝐧𝐜𝐞𝐝 𝐯𝐢𝐬𝐢𝐨𝐧-𝐛𝐚𝐬𝐞𝐝 𝐀𝐈 𝐚𝐭 𝐬𝐜𝐚𝐥𝐞 𝐢𝐧 𝐚𝐮𝐭𝐨𝐦𝐨𝐭𝐢𝐯𝐞 𝐚𝐩𝐩𝐥𝐢𝐜𝐚𝐭𝐢𝐨𝐧𝐬. 𝐓𝐡𝐢𝐬 𝐚𝐥𝐬𝐨 𝐫𝐞𝐟𝐥𝐞𝐜𝐭𝐬 𝐚 𝐛𝐫𝐨𝐚𝐝𝐞𝐫 𝐭𝐫𝐞𝐧𝐝: 𝐬𝐞𝐦𝐢𝐜𝐨𝐧𝐝𝐮𝐜𝐭𝐨𝐫 𝐜𝐨𝐦𝐩𝐚𝐧𝐢𝐞𝐬 𝐚𝐫𝐞 𝐜𝐨𝐧𝐬𝐨𝐥𝐢𝐝𝐚𝐭𝐢𝐧𝐠 𝐭𝐨 𝐬𝐭𝐚𝐲 𝐜𝐨𝐦𝐩𝐞𝐭𝐢𝐭𝐢𝐯𝐞 𝐢𝐧 𝐭𝐡𝐞 𝐀𝐈 𝐞𝐫𝐚. 𝐖𝐢𝐭𝐡 𝐞𝐝𝐠𝐞 𝐀𝐈 𝐛𝐞𝐜𝐨𝐦𝐢𝐧𝐠 𝐜𝐫𝐢𝐭𝐢𝐜𝐚𝐥 𝐟𝐨𝐫 𝐫𝐞𝐚𝐥-𝐭𝐢𝐦𝐞 𝐝𝐞𝐜𝐢𝐬𝐢𝐨𝐧-𝐦𝐚𝐤𝐢𝐧𝐠 𝐢𝐧 𝐯𝐞𝐡𝐢𝐜𝐥𝐞𝐬, 𝐚𝐜𝐪𝐮𝐢𝐬𝐢𝐭𝐢𝐨𝐧𝐬 𝐥𝐢𝐤𝐞 𝐭𝐡𝐢𝐬 𝐚𝐫𝐞 𝐥𝐞𝐬𝐬 𝐚𝐛𝐨𝐮𝐭 𝐞𝐱𝐩𝐚𝐧𝐬𝐢𝐨𝐧 & 𝐦𝐨𝐫𝐞 𝐚𝐛𝐨𝐮𝐭 𝐬𝐮𝐫𝐯𝐢𝐯𝐚𝐥 𝐚𝐧𝐝 𝐥𝐞𝐚𝐝𝐞𝐫𝐬𝐡𝐢𝐩. Ambarella shares jumped over 17% following the news, signaling market confidence in the strategic fit. #Semiconductors #AutomotiveAI #EdgeAI #NXP #Ambarella #AIChips #AutoTech #ChipIndustry #MergersAndAcquisitions #TechNews NXP Semiconductors NXP India Ambarella Inc, 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/gxf4JsJg

𝐑𝐞𝐧𝐞𝐬𝐚𝐬 𝐢𝐬 𝐫𝐞𝐬𝐡𝐚𝐩𝐢𝐧𝐠 𝐢𝐭𝐬 𝐟𝐨𝐨𝐭𝐩𝐫𝐢𝐧𝐭 𝐢𝐧 𝐉𝐚𝐩𝐚𝐧: 𝐭𝐡𝐞 𝐜𝐨𝐦𝐩𝐚𝐧𝐲 𝐰𝐢𝐥𝐥 𝐩𝐡𝐚𝐬𝐞 𝐨𝐮𝐭 𝐩𝐫𝐨𝐝𝐮𝐜𝐭𝐢𝐨𝐧 𝐚𝐭 𝐢𝐭𝐬 𝐓𝐚𝐤𝐚𝐬𝐚𝐤𝐢 𝐅𝐚𝐜𝐭𝐨𝐫𝐲 𝐨𝐯𝐞𝐫 𝐭𝐡𝐞 𝐧𝐞𝐱𝐭 2–3 𝐲𝐞𝐚𝐫𝐬, 𝐜𝐢𝐭𝐢𝐧𝐠 𝐚𝐠𝐢𝐧𝐠 6‑𝐢𝐧𝐜𝐡 𝐰𝐚𝐟𝐞𝐫 𝐥𝐢𝐧𝐞𝐬 𝐚𝐧𝐝 𝐭𝐢𝐠𝐡𝐭𝐞𝐧𝐢𝐧𝐠 𝐬𝐮𝐩𝐩𝐨𝐫𝐭 𝐟𝐨𝐫 𝐥𝐞𝐠𝐚𝐜𝐲 𝐞𝐪𝐮𝐢𝐩𝐦𝐞𝐧𝐭. But this isn’t just a closure story. Renesas plans to keep & strengthen R&D at the site (or nearby), zeroing in on analog ICs and discrete power semiconductors for data centers and automotive, two of its strategic growth pillars.finance.yahoo 𝐅𝐨𝐫 𝐜𝐮𝐬𝐭𝐨𝐦𝐞𝐫𝐬, 𝐑𝐞𝐧𝐞𝐬𝐚𝐬 𝐬𝐚𝐲𝐬 𝐢𝐭 𝐰𝐢𝐥𝐥 𝐦𝐚𝐧𝐚𝐠𝐞 𝐝𝐞𝐦𝐚𝐧𝐝 𝐜𝐚𝐫𝐞𝐟𝐮𝐥𝐥𝐲 𝐚𝐧𝐝 𝐛𝐮𝐢𝐥𝐝 𝐢𝐧𝐯𝐞𝐧𝐭𝐨𝐫𝐲 𝐭𝐨 𝐩𝐫𝐨𝐭𝐞𝐜𝐭 𝐬𝐮𝐩𝐩𝐥𝐲 𝐬𝐭𝐚𝐛𝐢𝐥𝐢𝐭𝐲 𝐝𝐮𝐫𝐢𝐧𝐠 𝐭𝐡𝐞 𝐭𝐫𝐚𝐧𝐬𝐢𝐭𝐢𝐨𝐧. 𝐅𝐨𝐫 𝐞𝐦𝐩𝐥𝐨𝐲𝐞𝐞𝐬, 𝐭𝐡𝐞 𝐬𝐭𝐚𝐭𝐞𝐝 𝐩𝐨𝐥𝐢𝐜𝐲 𝐢𝐬 𝐭𝐨 𝐬𝐞𝐜𝐮𝐫𝐞 𝐨𝐩𝐩𝐨𝐫𝐭𝐮𝐧𝐢𝐭𝐢𝐞𝐬 𝐯𝐢𝐚 𝐫𝐞𝐚𝐬𝐬𝐢𝐠𝐧𝐦𝐞𝐧𝐭 𝐚𝐧𝐝 𝐜𝐚𝐫𝐞𝐞𝐫 𝐬𝐮𝐩𝐩𝐨𝐫𝐭 𝐢𝐧𝐬𝐢𝐝𝐞 𝐚𝐧𝐝 𝐨𝐮𝐭𝐬𝐢𝐝𝐞 𝐭𝐡𝐞 𝐜𝐨𝐦𝐩𝐚𝐧𝐲.𝐟𝐢𝐧𝐚𝐧𝐜𝐞.𝐲𝐚𝐡𝐨𝐨 Renesas Electronics #Semiconductors #PowerElectronics #AnalogICs #AutomotiveElectronics #DataCenters #ChipIndustry #Manufacturing #SupplyChain #JapanTech 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/gzguwrx7

𝐂𝐡𝐢𝐧𝐚’𝐬 𝐑𝐨𝐛𝐨𝐭𝐢𝐜𝐬 𝐔𝐧𝐢𝐜𝐨𝐫𝐧𝐬 𝐉𝐮𝐬𝐭 𝐇𝐢𝐭 $3𝐁 & 𝐓𝐡𝐞𝐲’𝐫𝐞 𝐋𝐚𝐩𝐩𝐢𝐧𝐠 𝐭𝐡𝐞 𝐔.𝐒. 𝐓𝐡𝐞 𝐔.𝐒.-𝐂𝐡𝐢𝐧𝐚 𝐭𝐞𝐜𝐡 𝐫𝐢𝐯𝐚𝐥𝐫𝐲 𝐡𝐚𝐬 𝐚 𝐧𝐞𝐰 𝐟𝐫𝐨𝐧𝐭: 𝐞𝐦𝐛𝐨𝐝𝐢𝐞𝐝 𝐀𝐈. 𝐈𝐧 2026, 𝐫𝐨𝐛𝐨𝐭𝐢𝐜𝐬 𝐛𝐞𝐜𝐚𝐦𝐞 𝐭𝐡𝐞 𝐬𝐞𝐜𝐨𝐧𝐝-𝐡𝐨𝐭𝐭𝐞𝐬𝐭 𝐮𝐧𝐢𝐜𝐨𝐫𝐧 𝐬𝐞𝐜𝐭𝐨𝐫 𝐛𝐞𝐡𝐢𝐧𝐝 𝐀𝐈, 𝐰𝐢𝐭𝐡 23 𝐧𝐞𝐰 $1𝐁+ 𝐬𝐭𝐚𝐫𝐭𝐮𝐩𝐬. 𝐂𝐡𝐢𝐧𝐚 𝐥𝐞𝐚𝐝𝐬 𝐰𝐢𝐭𝐡 15 𝐮𝐧𝐢𝐜𝐨𝐫𝐧𝐬, 65% 𝐨𝐟 𝐭𝐡𝐞 𝐠𝐥𝐨𝐛𝐚𝐥 𝐭𝐨𝐭𝐚𝐥, 𝐰𝐡𝐢𝐥𝐞 𝐭𝐡𝐞 𝐔.𝐒. 𝐭𝐫𝐚𝐢𝐥𝐬 𝐰𝐢𝐭𝐡 𝐬𝐢𝐱. 𝐓𝐡𝐞 𝐯𝐚𝐥𝐮𝐚𝐭𝐢𝐨𝐧 𝐠𝐚𝐩 𝐢𝐬 𝐞𝐯𝐞𝐧 𝐬𝐭𝐚𝐫𝐤𝐞𝐫 China’s new robotics unicorns are worth $27.5B combined, nearly 3x the $10B of their U.S. counterparts. At the top of the pack: AI2 Robotics and X Square Robot, each now valued at ~$3B after major funding rounds backed by ByteDance, Xiaomi, Alibaba, and Meituan. Outside the U.S.-China axis, Europe and Japan logged their first pure-play robotics unicorns: UK’s Humanoid ($1.35B) and Tokyo’s Genki Robotics ($1B), founded by Android, Inc co-founder Andy Rubin. 𝐖𝐡𝐚𝐭’𝐬 𝐝𝐫𝐢𝐯𝐢𝐧𝐠 𝐭𝐡𝐞 𝐬𝐮𝐫𝐠𝐞? Investors are betting the next generation of AI won’t just live on screens, it’ll be built into machines. And China, with its manufacturing muscle and state-backed capital, is where those companies are emerging fastest. X Square Robot (自变量机器人) BestBrokers.com Crunchbase PitchBook ByteDance Xiaomi Technology Alibaba Group Meituan Genki Robotics #Robotics #EmbodiedAI #Unicorns #ChinaTech #AI #VentureCapital #DeepTech #Innovation #StartupFunding #TechNews #HumanoidRobots #Semiconductors #AIHardware #GlobalTech #FutureOfWork 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/gNsWf38F

𝐄𝐮𝐫𝐨𝐩𝐞 𝐣𝐮𝐬𝐭 𝐭𝐨𝐨𝐤 𝐚 𝐛𝐢𝐠 𝐬𝐭𝐞𝐩 𝐭𝐨𝐰𝐚𝐫𝐝 𝐜𝐡𝐢𝐩 𝐬𝐨𝐯𝐞𝐫𝐞𝐢𝐠𝐧𝐭𝐲 𝐎𝐩𝐞𝐧𝐜𝐡𝐢𝐩 𝐡𝐚𝐬 𝐢𝐧𝐭𝐫𝐨𝐝𝐮𝐜𝐞𝐝 𝐁𝐄𝐑10, 𝐚 𝐟𝐮𝐥𝐥𝐲 𝐟𝐮𝐧𝐜𝐭𝐢𝐨𝐧𝐚𝐥, 𝐋𝐢𝐧𝐮𝐱‑𝐜𝐚𝐩𝐚𝐛𝐥𝐞 64‑𝐛𝐢𝐭 𝐑𝐈𝐒𝐂‑𝐕 𝐩𝐫𝐨𝐜𝐞𝐬𝐬𝐨𝐫 𝐛𝐮𝐢𝐥𝐭 𝐨𝐧 𝐚 𝐥𝐞𝐚𝐝𝐢𝐧𝐠‑𝐞𝐝𝐠𝐞 𝐬𝐮𝐛‑2𝐧𝐦 𝐆𝐚𝐭𝐞‑𝐀𝐥𝐥‑𝐀𝐫𝐨𝐮𝐧𝐝 (𝐆𝐀𝐀) 𝐩𝐫𝐨𝐜𝐞𝐬𝐬. 𝐈𝐦𝐩𝐨𝐫𝐭𝐚𝐧𝐜𝐞 𝐨𝐟 𝐭𝐡𝐢𝐬 𝐧𝐞𝐰 𝐫𝐨𝐥𝐥𝐨𝐮𝐭: - Sovereign by design: Built in Europe for banks, hospitals, public institutions and critical infrastructure that need control over the hardware running their most sensitive data. - Real workloads, today: Four high‑performance cores, wide vector processing for AI/HPC, and high‑speed PCIe/AXI links, running real OSes and real software, not a lab demo. - Open architecture: Based on RISC‑V, an open ISA not owned by any single company or country, giving Europe the freedom to design, verify and control its own compute roadmap. Andrea Gallo, CEO of RISC‑V International, called BER10 confirmation that “2026 is the year of highly powerful RISC‑V application processor silicon” and that the architecture has moved beyond experimentation into industrial‑grade, real‑world computing. Cesc Guim, CEO of Openchip. “BER10 is that proof, made real. It’s a foundation for the digital sovereignty Europe needs, built on a more open and resilient value chain that ultimately benefits the global technology industry.” 𝐁𝐄𝐑10 𝐢𝐬 𝐭𝐡𝐞 𝐟𝐢𝐫𝐬𝐭 𝐬𝐭𝐞𝐩 𝐭𝐨𝐰𝐚𝐫𝐝 𝐎𝐩𝐞𝐧𝐜𝐡𝐢𝐩’𝐬 𝐧𝐞𝐱𝐭‑𝐠𝐞𝐧𝐞𝐫𝐚𝐭𝐢𝐨𝐧 𝐑𝐈𝐒𝐂‑𝐕 𝐚𝐜𝐜𝐞𝐥𝐞𝐫𝐚𝐭𝐨𝐫𝐬 𝐟𝐨𝐫 𝐬𝐮𝐩𝐞𝐫𝐜𝐨𝐦𝐩𝐮𝐭𝐢𝐧𝐠 𝐚𝐧𝐝 𝐀𝐈 𝐚𝐭 𝐝𝐚𝐭𝐚‑𝐜𝐞𝐧𝐭𝐞𝐫 𝐬𝐜𝐚𝐥𝐞, 𝐝𝐞𝐯𝐞𝐥𝐨𝐩𝐞𝐝 𝐰𝐢𝐭𝐡 𝐬𝐭𝐫𝐚𝐭𝐞𝐠𝐢𝐜 𝐩𝐚𝐫𝐭𝐧𝐞𝐫𝐬 𝐚𝐧𝐝 𝐩𝐚𝐭𝐡𝐟𝐢𝐧𝐝𝐢𝐧𝐠 𝐫𝐞𝐬𝐞𝐚𝐫𝐜𝐡 𝐚𝐥𝐨𝐧𝐠𝐬𝐢𝐝𝐞 𝐭𝐡𝐞 𝐁𝐚𝐫𝐜𝐞𝐥𝐨𝐧𝐚 𝐒𝐮𝐩𝐞𝐫𝐜𝐨𝐦𝐩𝐮𝐭𝐢𝐧𝐠 𝐂𝐞𝐧𝐭𝐞𝐫. OPENCHIP & SOFTWARE TECHNOLOGIES RISC-V International Barcelona Supercomputing Center #Semiconductors #RISCV #DigitalSovereignty #Europe #AI #HPC #DataCenters #Hardware #ChipDesign #TechNews #Openchip #Sub2nm #GAA #EuropeanTech #CriticalInfrastructure 𝐑𝐞𝐚𝐝 𝐭𝐡𝐞 𝐟𝐮𝐥𝐥 𝐬𝐭𝐨𝐫𝐲 𝐡𝐞𝐫𝐞: https://lnkd.in/g2FGMwBq

𝐑𝐞𝐧𝐞𝐬𝐚𝐬 𝐡𝐚𝐬 𝐮𝐧𝐯𝐞𝐢𝐥𝐞𝐝 𝐢𝐭𝐬 𝐭𝐡𝐢𝐫𝐝-𝐠𝐞𝐧𝐞𝐫𝐚𝐭𝐢𝐨𝐧 𝐃𝐃𝐑5 𝐌𝐑𝐃𝐈𝐌𝐌 𝐜𝐡𝐢𝐩𝐬𝐞𝐭, 𝐩𝐮𝐬𝐡𝐢𝐧𝐠 𝐬𝐞𝐫𝐯𝐞𝐫-𝐜𝐥𝐚𝐬𝐬 𝐦𝐞𝐦𝐨𝐫𝐲 𝐬𝐩𝐞𝐞𝐝𝐬 𝐭𝐨 16,000 𝐌𝐓/𝐬, 𝐚 25% 𝐣𝐮𝐦𝐩 𝐨𝐯𝐞𝐫 𝐆𝐞𝐧 2. 𝐖𝐡𝐚𝐭 𝐌𝐚𝐤𝐞𝐬 𝐢𝐭 𝐃𝐢𝐟𝐟𝐞𝐫𝐞𝐧𝐭: o Higher bandwidth for massive AI models and data-intensive workloads o No infrastructure overhaul: Works with existing DDR5 server platforms o Power-efficient design to balance performance with thermal constraints o Enhanced visibility: DESTM Quality Indication helps fine-tune timing and margins 𝐓𝐡𝐞 𝐆𝐞𝐧 3 𝐩𝐥𝐚𝐭𝐟𝐨𝐫𝐦 𝐢𝐧𝐜𝐥𝐮𝐝𝐞𝐬 𝐌𝐑𝐂𝐃, 𝐌𝐃𝐁, 𝐏𝐌𝐈𝐂, 𝐒𝐏𝐃 𝐇𝐮𝐛𝐬, 𝐚𝐧𝐝 𝐭𝐞𝐦𝐩𝐞𝐫𝐚𝐭𝐮𝐫𝐞 𝐬𝐞𝐧𝐬𝐨𝐫𝐬, 𝐚 𝐜𝐨𝐦𝐩𝐥𝐞𝐭𝐞, 𝐩𝐫𝐨𝐝𝐮𝐜𝐭𝐢𝐨𝐧-𝐫𝐞𝐚𝐝𝐲 𝐬𝐭𝐚𝐜𝐤 𝐟𝐨𝐫 𝐬𝐜𝐚𝐥𝐢𝐧𝐠 𝐌𝐑𝐃𝐈𝐌𝐌 𝐩𝐞𝐫𝐟𝐨𝐫𝐦𝐚𝐧𝐜𝐞 𝐚𝐜𝐫𝐨𝐬𝐬 𝐠𝐞𝐧𝐞𝐫𝐚𝐭𝐢𝐨𝐧𝐬. Renesas will showcase the new memory interface components at FMS 2026 (Future of Memory and Storage Conference), Santa Clara, Aug 4–6, Booth #807. 𝐀𝐬 𝐀𝐈 𝐰𝐨𝐫𝐤𝐥𝐨𝐚𝐝𝐬 𝐠𝐫𝐨𝐰, 𝐦𝐞𝐦𝐨𝐫𝐲 𝐛𝐚𝐧𝐝𝐰𝐢𝐝𝐭𝐡 𝐢𝐬 𝐛𝐞𝐜𝐨𝐦𝐢𝐧𝐠 𝐭𝐡𝐞 𝐛𝐨𝐭𝐭𝐥𝐞𝐧𝐞𝐜𝐤. 𝐌𝐑𝐃𝐈𝐌𝐌 𝐆𝐞𝐧 3 𝐥𝐨𝐨𝐤𝐬 𝐥𝐢𝐤𝐞 𝐚 𝐩𝐫𝐚𝐠𝐦𝐚𝐭𝐢𝐜 𝐩𝐚𝐭𝐡 𝐟𝐨𝐫𝐰𝐚𝐫𝐝, 𝐦𝐨𝐫𝐞 𝐩𝐞𝐫𝐟𝐨𝐫𝐦𝐚𝐧𝐜𝐞 𝐰𝐢𝐭𝐡𝐨𝐮𝐭 𝐫𝐢𝐩𝐩𝐢𝐧𝐠 𝐨𝐮𝐭 𝐲𝐨𝐮𝐫 𝐃𝐃𝐑5 𝐛𝐚𝐜𝐤𝐛𝐨𝐧𝐞. 𝐊𝐞𝐲 𝐂𝐨𝐦𝐦𝐞𝐧𝐭𝐬 “AMD has a long history of supporting open, standards-based technologies that power data center innovation and deliver greater flexibility as AI and HPC workloads continue to evolve,” said Amit Goel, Corporate Vice President, Compute and Enterprise AI Platform Solutions Engineering, AMD. “AI training and inferencing workloads are fundamentally reshaping system memory requirements for data center infrastructure,” said Sameer Kuppahalli, Vice President and General Manager, Memory Interface Division at Renesas. Renesas Electronics LoRa Alliance FMS: Future of Memory and Storage #Semiconductors #AI #DataCenters #DDR5 #MRDIMM #Memory #CloudComputing #Hardware #AIInfrastructure #ServerMemory #TechNews #FMS2026 #EdgeComputing #HighPerformanceComputing 𝐑𝐞𝐚𝐝 𝐭𝐡𝐞 𝐟𝐮𝐥𝐥 𝐬𝐭𝐨𝐫𝐲 𝐡𝐞𝐫𝐞: https://lnkd.in/grki4GDr

𝐍𝐞𝐨𝐂𝐨𝐫𝐭𝐞𝐜 𝐣𝐮𝐬𝐭 𝐝𝐫𝐨𝐩𝐩𝐞𝐝 𝐚 𝐧𝐞𝐰 𝐰𝐡𝐢𝐭𝐞 𝐩𝐚𝐩𝐞𝐫 𝐭𝐡𝐚𝐭 𝐬𝐨𝐥𝐯𝐞𝐬 𝐨𝐧𝐞 𝐨𝐟 𝐈𝐨𝐓'𝐬 𝐭𝐨𝐮𝐠𝐡𝐞𝐬𝐭 𝐜𝐡𝐚𝐥𝐥𝐞𝐧𝐠𝐞𝐬, 𝐚𝐧𝐝 𝐭𝐡𝐚𝐭 𝐢𝐬 𝐡𝐨𝐰 𝐭𝐨 𝐝𝐞𝐩𝐥𝐨𝐲 𝐭𝐡𝐨𝐮𝐬𝐚𝐧𝐝𝐬 𝐨𝐟 𝐬𝐞𝐧𝐬𝐨𝐫𝐬 𝐚𝐜𝐫𝐨𝐬𝐬 𝐝𝐢𝐟𝐟𝐢𝐜𝐮𝐥𝐭 𝐭𝐞𝐫𝐫𝐚𝐢𝐧 𝐰𝐢𝐭𝐡𝐨𝐮𝐭 𝐛𝐮𝐫𝐧𝐢𝐧𝐠 𝐭𝐡𝐫𝐨𝐮𝐠𝐡 𝐛𝐚𝐭𝐭𝐞𝐫𝐢𝐞𝐬 𝐨𝐫 𝐠𝐚𝐭𝐞𝐰𝐚𝐲 𝐛𝐮𝐝𝐠𝐞𝐭𝐬. 𝐓𝐡𝐞𝐢𝐫 𝐚𝐧𝐬𝐰𝐞𝐫? 𝐍𝐞𝐨𝐌𝐞𝐬𝐡 𝐨𝐧 𝐋𝐨𝐑𝐚® 𝐖𝐡𝐲 𝐓𝐨 𝐃𝐨𝐰𝐧𝐥𝐨𝐚𝐝: o No repeaters, no routers: Every node routes traffic. No mains-powered infrastructure needed. o 7–10 year battery life: Time-synchronized, ultra-low-power mesh that sleeps most of the time. o LoRa's range + NeoMesh's self-healing: Multi-hop communication that adapts to failures automatically. o Built for tough environments: Underground, forests, industrial sites, large buildings, where traditional LoRaWAN star topologies struggle. 𝐑𝐞𝐚𝐥-𝐰𝐨𝐫𝐥𝐝 𝐮𝐬𝐞 𝐜𝐚𝐬𝐞𝐬 𝐚𝐥𝐫𝐞𝐚𝐝𝐲 𝐢𝐧 𝐭𝐡𝐞 𝐟𝐢𝐞𝐥𝐝: o Building energy optimization o Fire detection in commercial properties o Forestry and underground monitoring o Industrial sensing where gateway deployment is impractical 𝐅𝐨𝐫 𝐝𝐞𝐧𝐬𝐞, 𝐛𝐚𝐭𝐭𝐞𝐫𝐲-𝐩𝐨𝐰𝐞𝐫𝐞𝐝 𝐈𝐨𝐓 𝐧𝐞𝐭𝐰𝐨𝐫𝐤𝐬 𝐭𝐡𝐚𝐭 𝐧𝐞𝐞𝐝 𝐭𝐨 𝐬𝐜𝐚𝐥𝐞 𝐭𝐨 𝐭𝐡𝐨𝐮𝐬𝐚𝐧𝐝𝐬 𝐨𝐟 𝐧𝐨𝐝𝐞𝐬, 𝐩𝐚𝐢𝐫𝐢𝐧𝐠 𝐚 𝐝𝐞𝐜𝐞𝐧𝐭𝐫𝐚𝐥𝐢𝐳𝐞𝐝 𝐦𝐞𝐬𝐡 𝐩𝐫𝐨𝐭𝐨𝐜𝐨𝐥 𝐰𝐢𝐭𝐡 𝐋𝐨𝐑𝐚'𝐬 𝐢𝐧𝐭𝐞𝐫𝐟𝐞𝐫𝐞𝐧𝐜𝐞-𝐫𝐞𝐬𝐢𝐬𝐭𝐚𝐧𝐭 𝐏𝐇𝐘 𝐢𝐬 𝐚 𝐠𝐚𝐦𝐞-𝐜𝐡𝐚𝐧𝐠𝐞𝐫. 𝐃𝐨𝐰𝐧𝐥𝐨𝐚𝐝 𝐭𝐡𝐞 𝐟𝐮𝐥𝐥 𝐰𝐡𝐢𝐭𝐞 𝐩𝐚𝐩𝐞𝐫 𝐡𝐞𝐫𝐞: https://lnkd.in/gY3DeVCA NeoCortec LoRa Alliance #IoT #Semiconductors #LoRa #NeoMesh #WirelessConnectivity #IndustrialIoT #SmartBuildings #EdgeComputing #BatteryPowered #TechInnovation #IIoT #EmbeddedSystems #LPWAN #SmartInfrastructure

𝐂𝐡𝐢𝐩𝐀𝐠𝐞𝐧𝐭𝐬 𝐢𝐬 𝐩𝐮𝐭𝐭𝐢𝐧𝐠 𝐬𝐞𝐫𝐢𝐨𝐮𝐬 𝐦𝐨𝐦𝐞𝐧𝐭𝐮𝐦 𝐛𝐞𝐡𝐢𝐧𝐝 𝐚𝐠𝐞𝐧𝐭𝐢𝐜 𝐀𝐈 𝐢𝐧 𝐬𝐞𝐦𝐢𝐜𝐨𝐧𝐝𝐮𝐜𝐭𝐨𝐫 𝐝𝐞𝐬𝐢𝐠𝐧. The company just added $60M in Series A2 financing, bringing its expanded Series A round to $134M in only six months. Backers now include @BCapital, Bessemer Venture Partners, Micron Technolog y, MediaTek, Ericsson, ScOp Venture Capital and other existing investors – a strong signal that autonomous AI for chip design is moving from concept to must‑have capability. 𝐈𝐧 𝐇1 2026 𝐚𝐥𝐨𝐧𝐞, 𝐂𝐡𝐢𝐩𝐀𝐠𝐞𝐧𝐭𝐬 𝐠𝐫𝐞𝐰 𝐀𝐑𝐑 6𝐱 𝐚𝐧𝐝 𝐝𝐞𝐩𝐥𝐨𝐲𝐞𝐝 𝐢𝐭𝐬 𝐩𝐥𝐚𝐭𝐟𝐨𝐫𝐦 𝐚𝐭 𝐦𝐨𝐫𝐞 𝐭𝐡𝐚𝐧 120 𝐬𝐞𝐦𝐢𝐜𝐨𝐧𝐝𝐮𝐜𝐭𝐨𝐫 𝐜𝐨𝐦𝐩𝐚𝐧𝐢𝐞𝐬, 𝐢𝐧𝐜𝐥𝐮𝐝𝐢𝐧𝐠 𝐌𝐞𝐝𝐢𝐚𝐓𝐞𝐤 𝐚𝐧𝐝 𝐌𝐢𝐜𝐫𝐨𝐧. 𝐓𝐡𝐞 𝐜𝐨𝐦𝐩𝐚𝐧𝐲 𝐢𝐬 𝐛𝐮𝐢𝐥𝐝𝐢𝐧𝐠 𝐨𝐧𝐞 𝐨𝐟 𝐭𝐡𝐞 𝐢𝐧𝐝𝐮𝐬𝐭𝐫𝐲’𝐬 𝐥𝐞𝐚𝐝𝐢𝐧𝐠 𝐚𝐮𝐭𝐨𝐧𝐨𝐦𝐨𝐮𝐬 𝐩𝐥𝐚𝐭𝐟𝐨𝐫𝐦𝐬 𝐟𝐨𝐫 𝐜𝐡𝐢𝐩 𝐝𝐞𝐬𝐢𝐠𝐧 𝐚𝐧𝐝 𝐯𝐞𝐫𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧, 𝐚𝐢𝐦𝐞𝐝 𝐚𝐭 𝐬𝐡𝐫𝐢𝐧𝐤𝐢𝐧𝐠 𝐞𝐧𝐠𝐢𝐧𝐞𝐞𝐫𝐢𝐧𝐠 𝐜𝐲𝐜𝐥𝐞𝐬 𝐟𝐫𝐨𝐦 𝐦𝐨𝐧𝐭𝐡𝐬 𝐨𝐫 𝐰𝐞𝐞𝐤𝐬 𝐝𝐨𝐰𝐧 𝐭𝐨 𝐝𝐚𝐲𝐬 𝐨𝐫 𝐡𝐨𝐮𝐫𝐬. 𝐖𝐡𝐚𝐭 𝐬𝐞𝐭𝐬 𝐂𝐡𝐢𝐩𝐀𝐠𝐞𝐧𝐭𝐬 𝐚𝐩𝐚𝐫𝐭 𝐢𝐬 𝐢𝐭𝐬 𝐟𝐨𝐜𝐮𝐬 𝐨𝐧 𝐚𝐠𝐞𝐧𝐭𝐬, 𝐧𝐨𝐭 𝐣𝐮𝐬𝐭 𝐜𝐨𝐩𝐢𝐥𝐨𝐭𝐬. 𝐈𝐧𝐬𝐭𝐞𝐚𝐝 𝐨𝐟 𝐬𝐢𝐦𝐩𝐥𝐲 𝐚𝐬𝐬𝐢𝐬𝐭𝐢𝐧𝐠 𝐰𝐢𝐭𝐡 𝐢𝐬𝐨𝐥𝐚𝐭𝐞𝐝 𝐜𝐨𝐝𝐢𝐧𝐠 𝐭𝐚𝐬𝐤𝐬, 𝐢𝐭𝐬 𝐝𝐨𝐦𝐚𝐢𝐧‑𝐬𝐩𝐞𝐜𝐢𝐟𝐢𝐜 𝐀𝐈 𝐚𝐠𝐞𝐧𝐭𝐬 𝐜𝐚𝐧 𝐩𝐥𝐚𝐧 𝐚𝐧𝐝 𝐞𝐱𝐞𝐜𝐮𝐭𝐞 𝐜𝐨𝐦𝐩𝐥𝐞𝐱, 𝐦𝐮𝐥𝐭𝐢‑𝐬𝐭𝐞𝐩 𝐝𝐞𝐬𝐢𝐠𝐧 𝐚𝐧𝐝 𝐯𝐞𝐫𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧 𝐰𝐨𝐫𝐤𝐟𝐥𝐨𝐰𝐬 𝐞𝐧𝐝‑𝐭𝐨‑𝐞𝐧𝐝. 𝐅𝐨𝐫 𝐭𝐞𝐚𝐦𝐬 𝐮𝐧𝐝𝐞𝐫 𝐩𝐫𝐞𝐬𝐬𝐮𝐫𝐞 𝐭𝐨 𝐝𝐞𝐥𝐢𝐯𝐞𝐫 𝐢𝐧𝐜𝐫𝐞𝐚𝐬𝐢𝐧𝐠𝐥𝐲 𝐜𝐨𝐦𝐩𝐥𝐞𝐱 𝐜𝐡𝐢𝐩𝐬 𝐟𝐚𝐬𝐭𝐞𝐫, 𝐭𝐡𝐢𝐬 𝐢𝐬 𝐚𝐛𝐨𝐮𝐭 𝐫𝐞𝐝𝐞𝐬𝐢𝐠𝐧𝐢𝐧𝐠 𝐭𝐡𝐞 𝐬𝐞𝐦𝐢𝐜𝐨𝐧𝐝𝐮𝐜𝐭𝐨𝐫 𝐭𝐨𝐨𝐥𝐜𝐡𝐚𝐢𝐧, 𝐧𝐨𝐭 𝐣𝐮𝐬𝐭 𝐚𝐝𝐝𝐢𝐧𝐠 𝐚𝐧𝐨𝐭𝐡𝐞𝐫 𝐚𝐬𝐬𝐢𝐬𝐭𝐢𝐯𝐞 𝐨𝐯𝐞𝐫𝐥𝐚𝐲. "As the industry deals with the simultaneous pressures of increasing architectural complexity and time-to-market pressure, semiconductor companies need solutions that increase productivity, shrink time-to-market, and minimize the risk of design flaws," said William Yang Wang, CEO and Founder of ChipAgents. ChipAgents BCapital Fund Bessemer Venture Partners Micron Technology MediaTek Ericsson #Semiconductors #ChipDesign #AgenticAI #EDA #AIinEngineering #DeepTech #VentureCapital #AutonomousAgents #TimeToMarket #DesignAutomation 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/gteJykfG

𝐁𝐢𝐠 𝐦𝐨𝐯𝐞 𝐟𝐨𝐫 𝐔.𝐒. 𝐜𝐡𝐢𝐩𝐬 𝐚𝐧𝐝 𝐀𝐈 𝐡𝐚𝐫𝐝𝐰𝐚𝐫𝐞. 𝐓𝐡𝐞 𝐃𝐞𝐩𝐚𝐫𝐭𝐦𝐞𝐧𝐭 𝐨𝐟 𝐂𝐨𝐦𝐦𝐞𝐫𝐜𝐞 𝐣𝐮𝐬𝐭 𝐬𝐢𝐠𝐧𝐞𝐝 𝐥𝐞𝐭𝐭𝐞𝐫𝐬 𝐨𝐟 𝐢𝐧𝐭𝐞𝐧𝐭 𝐭𝐨 𝐝𝐢𝐫𝐞𝐜𝐭 $874𝐌 𝐢𝐧 𝐂𝐇𝐈𝐏𝐒 𝐚𝐧𝐝 𝐒𝐜𝐢𝐞𝐧𝐜𝐞 𝐀𝐜𝐭 𝐟𝐮𝐧𝐝𝐢𝐧𝐠 𝐭𝐨 𝐬𝐞𝐯𝐞𝐧 𝐜𝐨𝐦𝐩𝐚𝐧𝐢𝐞𝐬 𝐫𝐚𝐜𝐢𝐧𝐠 𝐭𝐨 𝐛𝐮𝐢𝐥𝐝 𝐭𝐡𝐞 𝐧𝐞𝐱𝐭 𝐠𝐞𝐧𝐞𝐫𝐚𝐭𝐢𝐨𝐧 𝐨𝐟 𝐜𝐨𝐦𝐩𝐮𝐭𝐞 𝐢𝐧𝐟𝐫𝐚𝐬𝐭𝐫𝐮𝐜𝐭𝐮𝐫𝐞. 𝐓𝐡𝐢𝐬 𝐢𝐬𝐧’𝐭 𝐚𝐛𝐨𝐮𝐭 𝐟𝐚𝐛𝐬. 𝐈𝐭’𝐬 𝐚𝐛𝐨𝐮𝐭 𝐭𝐡𝐞 𝐡𝐚𝐫𝐝‑𝐭𝐨‑𝐬𝐞𝐞, 𝐡𝐚𝐫𝐝‑𝐭𝐨‑𝐫𝐞𝐩𝐥𝐚𝐜𝐞 𝐥𝐚𝐲𝐞𝐫𝐬 𝐭𝐡𝐚𝐭 𝐦𝐚𝐤𝐞 𝐀𝐈 𝐬𝐲𝐬𝐭𝐞𝐦𝐬 𝐟𝐚𝐬𝐭𝐞𝐫, 𝐦𝐨𝐫𝐞 𝐞𝐟𝐟𝐢𝐜𝐢𝐞𝐧𝐭 𝐚𝐧𝐝 𝐦𝐨𝐫𝐞 𝐬𝐞𝐜𝐮𝐫𝐞: - Co‑packaged optics sitting right next to AI processors - New 3D and ferroelectric memory architectures - Advanced packaging that stacks chips and connects them with thousands of interconnects - Ultra‑low‑loss dielectrics, thermodynamic sampling units, secure supply‑chain tech, and indium‑phosphide‑free photonic substrates 𝐍𝐚𝐦𝐞𝐬 𝐢𝐧 𝐭𝐡𝐞 𝐦𝐢𝐱: GlobalFoundries, Kepler, Multibeam, Extropic, Thintronics®, OBSIDIA Semiconductors and Aeluma. Full details: www.grants.gov (announcement 2025‑NIST‑CHIPS‑CRDO‑01) “With today’s compute supply chain investments, the Trump Administration is accelerating America’s innovation engine,” said Secretary of Commerce Howard W. Lutnick. “These strategic investments will enhance our country’s domestic capabilities, create high-paying jobs and keep America at the forefront of the semiconductor industry.” “These CHIPS R&D incentives will support breakthroughs in compute and communication infrastructures to power next-generation AI capabilities,” said Bill Frauenhofer, the Executive Director for Semiconductor Innovation and Investment at the Department of Commerce. GlobalFoundries Kepler Multibeam Corporation U.S. Department of Commerce National Institute of Standards and Technology (NIST) CHIPS for America #Semiconductors CHIPSAct #AIInfrastructure #AdvancedPackaging #SiliconPhotonics #MemoryTechnology #SupplyChainSecurity #ElectronicsManufacturing #DeepTech #HardwareInnovation #USManufacturing #TechPolicy 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/ggbJzpXe

𝐌𝐚𝐫𝐯𝐞𝐥𝐥 𝐢𝐬 𝐦𝐚𝐤𝐢𝐧𝐠 𝐨𝐧𝐞 𝐨𝐟 𝐢𝐭𝐬 𝐛𝐢𝐠𝐠𝐞𝐬𝐭 𝐛𝐞𝐭𝐬 𝐨𝐧 𝐈𝐧𝐝𝐢𝐚 𝐲𝐞𝐭. The US chip designer has announced a $250 million investment over the next three years to scale up technology development, engineering talent and infrastructure in the country. 𝐖𝐡𝐚𝐭’𝐬 𝐢𝐧 𝐭𝐡𝐞 𝐩𝐥𝐚𝐧: - Double its India headcount over three years, building on an estimated base of around 1,700 engineers. - Unveil a new wing at its Bengaluru campus and expand its Hyderabad footprint, on top of existing centers in Bengaluru, Pune and Hyderabad. 𝐅𝐨𝐜𝐮𝐬 𝐨𝐧 𝐀𝐈, 𝐜𝐥𝐨𝐮𝐝 𝐚𝐧𝐝 𝐝𝐚𝐭𝐚 𝐢𝐧𝐟𝐫𝐚𝐬𝐭𝐫𝐮𝐜𝐭𝐮𝐫𝐞 𝐜𝐡𝐢𝐩𝐬, 𝐰𝐢𝐭𝐡 𝐈𝐧𝐝𝐢𝐚𝐧 𝐭𝐞𝐚𝐦𝐬 𝐰𝐨𝐫𝐤𝐢𝐧𝐠 𝐚𝐜𝐫𝐨𝐬𝐬 𝐝𝐢𝐠𝐢𝐭𝐚𝐥 𝐝𝐞𝐬𝐢𝐠𝐧, 𝐚𝐫𝐜𝐡𝐢𝐭𝐞𝐜𝐭𝐮𝐫𝐞, 𝐚𝐧𝐚𝐥𝐨𝐠, 𝐦𝐢𝐱𝐞𝐝 𝐬𝐢𝐠𝐧𝐚𝐥, 𝐯𝐞𝐫𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧 𝐚𝐧𝐝 𝐯𝐚𝐥𝐢𝐝𝐚𝐭𝐢𝐨𝐧 𝐨𝐧 5 𝐧𝐦, 3 𝐧𝐦 𝐚𝐧𝐝 2 𝐧𝐦 𝐧𝐨𝐝𝐞𝐬. 𝐖𝐡𝐲 𝐢𝐭 𝐦𝐚𝐭𝐭𝐞𝐫𝐬 𝐟𝐨𝐫 𝐈𝐧𝐝𝐢𝐚’𝐬 𝐜𝐡𝐢𝐩 𝐬𝐭𝐨𝐫𝐲: The move comes just weeks after New Delhi approved an extra $13.38 billion for its semiconductor programme, signaling stronger state backing for design and manufacturing. Marvell has flagged longer term ambitions in India, including partnerships with startups and universities and exploratory talks with local fabs under confidentiality. 𝐌𝐚𝐫𝐯𝐞𝐥𝐥 𝐚𝐥𝐬𝐨 𝐮𝐬𝐞𝐝 𝐭𝐡𝐞 𝐦𝐢𝐥𝐞𝐬𝐭𝐨𝐧𝐞 𝐞𝐯𝐞𝐧𝐭 𝐭𝐨 𝐡𝐢𝐠𝐡𝐥𝐢𝐠𝐡𝐭 𝐢𝐭𝐬 𝐌𝐒𝐓𝐄𝐌 𝐬𝐜𝐡𝐨𝐥𝐚𝐫𝐬𝐡𝐢𝐩 𝐩𝐫𝐨𝐠𝐫𝐚𝐦, 𝐰𝐡𝐢𝐜𝐡 𝐡𝐚𝐬 𝐚𝐥𝐫𝐞𝐚𝐝𝐲 𝐬𝐞𝐥𝐞𝐜𝐭𝐞𝐝 100 𝐬𝐭𝐮𝐝𝐞𝐧𝐭𝐬 𝐟𝐫𝐨𝐦 𝐚 𝐩𝐨𝐨𝐥 𝐨𝐟 𝐦𝐨𝐫𝐞 𝐭𝐡𝐚𝐧 7,000 𝐚𝐩𝐩𝐥𝐢𝐜𝐚𝐧𝐭𝐬 𝐭𝐨 𝐬𝐮𝐩𝐩𝐨𝐫𝐭 𝐭𝐡𝐞 𝐧𝐞𝐱𝐭 𝐠𝐞𝐧𝐞𝐫𝐚𝐭𝐢𝐨𝐧 𝐨𝐟 𝐀𝐈 𝐚𝐧𝐝 𝐬𝐞𝐦𝐢𝐜𝐨𝐧𝐝𝐮𝐜𝐭𝐨𝐫 𝐞𝐧𝐠𝐢𝐧𝐞𝐞𝐫𝐬. “India has become a strategic hub of engineering excellence for Marvell, playing a critical role in advancing the infrastructure technologies that power the world’s leading hyperscalers and cloud providers,” said Navin Bishnoi, vice president and India country manager, at Marvell. Marvell Technology Ashwini Vaishnaw Ministry of Electronics and Information Technology India Semiconductor Mission nasscom Semiconductor Industry Association #Semiconductors #AI #ChipDesign #MakeInIndia #IndiaTech #DataInfrastructure #RnD #ElectronicsManufacturing 𝐃𝐞𝐞𝐩 𝐃𝐢𝐯𝐞 𝐇𝐞𝐫𝐞: https://lnkd.in/geD8nKMp