Colin Lyden

Microsystem packaging in 3D

Packaging influences the reliability and performance of microsystems. A brief history of developm... more Packaging influences the reliability and performance of microsystems. A brief history of developments in packaging is presented along with an overview of 3D packaging philosophy. An example of the integration of a micromachined silicon membrane pump into a 3D vertical multichip module package is presented. Finite element techniques are used to analyze the encapsulation stress in the assembled structure to

High sensitivity, low power, silicon magnetic field detector

A CMOS magnetic field sensitive oscillator is presented. The device is aimed at a very low power ... more A CMOS magnetic field sensitive oscillator is presented. The device is aimed at a very low power application, where small size is essential. When subjected to a 10 Gauss magnetic field, it registers a 3 Hz change in frequency, which is readily detectable and above the noise floor, while drawing only 100 nA from a 2 V supply. This represents a factor of thirty improvement in sensitivity over previously reported devices and the highest sensitivity/power ratio reported to date for a silicon magnetic field sensor

Implementing ΣΔ modulator prototype designs on an FPGA

Lecture Notes in Computer Science, 1996

This work describes using Xilinx fpgas to validate designs for ΣΔ modulators.The modulator design... more

Mixed-signal automatic test program generation

by Colin Lyden and Aidan Keady

A novel program is presented which automates the generation of test programs for analogue and mix... more A novel program is presented which automates the generation of test programs for analogue and mixed-signal integrated circuits. The tests are entered graphically by the IC designer, providing a link between the design and test stages in IC development. The program developed can be used with any schematic entry front end capable of writing EDIF 200 netlists. The tests entered are checked by the program to ensure the tester has the necessary resources available and tester code is generated without further user input

A 0.18μm 102dB-SNR mixed CT SC audio-band ΔΣ ADC

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005., 2005

... It has been well documented that contin-uous-time ADCs are favored over switched-capacitor AD... more

Design automation of σΔ DACs using SIGGEN

Microelectronics Journal, 1998

This paper presents a design tool dedicated to finding the optimum design solution for a EA DAC, ... more This paper presents a design tool dedicated to finding the optimum design solution for a EA DAC, based on a high level specification. The tool tackles the problem by first choosing the optimum EA modulator design by using a mixture of design equations and behavioral simulation. The tool enables a VHDL description of the interpolating stages and Y.A modulator to be generated. This facilitates automatic layout of the synthesized design. A high specification analog DAC cell completes the analog circuitry requirement. The layout of the analog part is manual but this is autoplaced and routed with the digital parts by commercial software.

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Analysis of distributed resistance effects in MOS transistors

by Colin Lyden and C. Cahill

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989

This paper presents a method of modeling the distributed source and drain resistance effects in M... more This paper presents a method of modeling the distributed source and drain resistance effects in MOS transistors. Simulations done using this technique are validated by comparisons with purposebuilt test structures. The method is then used to examine a problem which arises with the use of high temperature interconnect in 3-D silicon-on-insulator (3-D S . 0 . I ) technologies. The results show how the resistivity of the interconnect affects the performance of the substrate devices of this technology and outlines the benefits achievable through further development of the existing interconnect technologies. Finally, the procedure is used to examine the effect of reduced contact size on standard MOS devices and results are presented which give general guidelines to the extent of the effect.

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Tree structure for mismatch noise-shaping multibit DAC

by Colin Lyden and Aidan Keady

Electronics Letters, 1997

9 PARK, E.S., and MERCER, M.R.: 'Robust and non-robust tests for path delay faults in combination... more

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Comparison of mismatch error shaping in multibit oversampled converters

by Colin Lyden and Aidan Keady

Electronics Letters, 1998

ABSTRACT A number of mismatch error-shaping schemes for oversampled DACs are compared. Simulation... more ABSTRACT A number of mismatch error-shaping schemes for oversampled DACs are compared. Simulation results are presented to show that such a comparison should take account of the distribution of the mismatch errors, since the pattern of errors present affects different algorithms in different ways. A scheme for improving the error tolerance of one mismatch shaping architecture is presented

A CMOS continuous-time field programmable analog array

A circuit design for a Field Programmable Analog Array is presented which improves accuracy and r... more A circuit design for a Field Programmable Analog Array is presented which improves accuracy and repeatability compared to previous designs. Controlled by a configuration register, continuous-time signals are routed among programmable analog blocks to implement the user's chosen circuit. The configurable connections are realised by CMOS switches and a new innovation is that these are either buffered or nulled to cancel parasitic error. The function blocks are Op-Amps combined with passive networks which allow programmable transfer functions with accuracy insensitive to variations in process parameters and environment. The intended application area is the rapid development of analog circuits which are presently prototyped by PCBs stuffed with Op-Amp and passive components. The concept has been demonstrated on a CMOS IC and the resulting performance shows the feasibility of this approach to general purpose FPAA technology.

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A bandpass sigma–delta demodulator for digital radio

by Colin Lyden and Aidan Keady

Atmospheric Environment, 1999

This paper describes a bandpass Sigma-Delta A/D converter for use in digital radio receivers for ... more

A bandpass sigma-delta demodulator

by Colin Lyden and Aidan Keady

A new architecture for bandpass Sigma-Delta A/D conversion/demodulation with particular applicati... more A new architecture for bandpass Sigma-Delta A/D conversion/demodulation with particular application in radio reception is described. The proposed architecture is efficient in terms of silicon area usage and has improved perforniance over existing topologies. A chopping scheme shifts signals from the passband to DC and a lowpass modulator is then used to perform the conversion. In the new implementation, the passband location is limited only by the maximum sampling rate achievable rather than the lower maximum modulator clock rate. Hence, the new converter can digitize bands at much higher frequencies than previous implementations, while an intrinsic anti-aliasing filter means that external anti-aliasing filter requirements are relaxed compared with undersampling converters. Simulation results are presented showing the operation of the converter with a QPSK-modulated input.

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