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Analog Circuit Design
2003, Analog Circuit Design
https://doi.org/10.1007/B105729visibility
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Abstract
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The book 'Analog Circuit Design' compiles contributions from the 17th Advances in Analog Circuit Design workshop, showcasing advancements in three main areas: high-speed clock and data recovery, high-performance amplifiers, and power management. Organized by experts from the University of Pavia, this volume serves as a reference for analog and mixed signal design professionals, emphasizing the collaborative efforts of leading designers in the field.
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DOI to the publisher's website. • The final author version and the galley proof are versions of the publication after peer review. • The final published version features the final layout of the paper including the volume, issue and page numbers. Link to publication General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal. If the publication is distributed under the terms of Article 25fa of the Dutch Copyright Act, indicated by the "Taverne" license above, please follow below link for the End User Agreement:
Introduction to the Special Issue on the 2003 IEEE Bipolar/BiCMOS Circuits and Technology Meeting
IEEE Journal of Solid-State Circuits, 2000
CIRCUIT DESIGN FOR WIRELESS COMMUNICATIONS THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE
Eight decades ago, Armstrong invented the hyterodyne radio receiver architecture which was agreat success that almost aH high performance wireless recei vers reported in the literature have adopted this architecture. Today, cellular communication systems are required to provide voice, data, video and audio communication services. Two key requirements for the design of a mobile terminal in such a system are low cost and low power consumption. The cost is widely concerned as the most important factor in today's very competitive environment. On the other hand, low power consumption is mandatory to prevent the shortening of battery life time while the amount of information to be proces sed by the terminal is steadily increasing. Many people believe that by integrating as many circuit components as possible in a CMOS technology can help to reduce the cost and power consumption, and at the same time, reduce the size of the receiver. Hyterodyne architectures are not suitable for high level of integration, because they need many off-chip image rejection filters and channel selection filters. Recently, receiver architectures that are more suitable for high level of integration, such as the image rejection, low IF and direct conversion, have attracted much attention from many design engineers and researchers. AU these architectures that apply image cancellation methods rather than off-chip image rejection filters encounter a fundamental problem of limited image rejection performance caused by analogue circuit imperfection such as the gain and phase imhalance hetween the in-phase (1) and quadrature (Q) paths of the receiver. This problem becomes more prominent if the receiver is of wideband. This limited image rejection is a big obstacle to achieve single chip integration of the recei ver. This book focuses on the image rejection problem and its solutions in various receiver architectures. Basically, the non-filtering methods for improving image rejection can be divided into two broad types. The first type of methods provides more accurate analog circuits that have less impact on the 1 and 11 Q imbalance. The second type of methods corrects or calibrates the I and Q imbalance by tuning or digital signal processing. Apart from conventional methods, several new methods have been presented in this book. The new methods of the first type includes the switched-capacitor Hilbert transformers for accurate quadrature signal generation in a wide bandwidth and high performance sampling circuits that can also perform quadrature signal generation. The new methods of the second type includes the wideband digital IjQ imbalance calibration method and the adaptive IjQ imbalan ce correction method. These calibration or correction methods have taken the frequency dependence of the IjQ imbalance, which must be considered in a wideband receiver, into account. Some design examples have been included to demonstrate the proposed methods. This book is mainly based on the materials of my PhD thesis which was supervised by Prof. Franca and co-supervised by Prof. Azeredo-Leme. The research work presented in this book was supported by the Foundation of Science and Technology of the Ministry of Science and Technology of Portugal and the European Commission ESPRIT project PAPRICA. I would like to take this opportunity to thank my former colleagues in the Integrated Circuits and Systems Group,
Low voltage analog circuit design techniques
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State of the art in the analog CMOS circuit design
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This paper is not intended to cover CMOS analog circuit design exhaustively. Yet, it describes how much CMOS technology has been involved in analog circuit design despite the general opinion that CMOS is only suited for digital design. After some developments in the CMOS technology have been discussed, the analog building block scene is covered. The analog building blocks can roughly be divided into two subgroups: the switched-capacitor and the non-switched-capacitor building blocks. Following this subdivision different approaches are briefly looked at. Several tables conclude this review and indicate that new analog developments in CMOS circuit design are still to be expected. Next, the CAD tool development for analog CMOS is discussed, showing that there is still a lot to be done in the field of automated analog design. In conclusion, some ideas concerning analog CAD or, concerning CAD in a more general sense are described.
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Power consumption of analog circuits: a tutorial
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A systematic approach to the power consumption of analog circuits is presented. The power consumption is related to basic circuit requirements, as dynamic range, bandwidth, noise figure and sampling speed and is considering basic device and device scaling behavior. Several kinds of circuits are treated, as samplers, amplifiers, filters and oscillators. The objective is to derive lower bounds to power consumption in analog circuits, to be used as design targets when designing power-constrained analog systems. Keywords Low power design • fundamental limits • dynamic range • technology scaling • analog building blocks
Analog Circuit Design
Michiel Steyaert · Arthur H. M. van Roermund ·
Herman Casier
Editors
Analog Circuit Design
High-speed Clock and Data Recovery,
High-performance Amplifiers,
Power Management
123
Editors
Prof.dr.ir. Michiel Steyaert Prof.dr.ir. Arthur H.M. van Roermund
Katholieke Universiteit Leuven Eindhoven University of Technology
Dept. Electrical Engineering Dept. of Electrical Engineering
(ESAT) 5600 MB Eindhoven
Kasteelpark Arenberg 10 The Netherlands
3001 Leuven [email protected]
Belgium
Ir. Herman Casier
Avondster 6
8520 Kuurne
Belgium
herman [email protected]
ISBN: 978-1-4020-8943-5 e-ISBN: 978-1-4020-8944-2
Library of Congress Control Number: 2008934593
c Springer Science+Business Media B.V. 2009
No part of this work may be reproduced, stored in a retrieval system, or transmitted
in any form or by any means, electronic, mechanical, photocopying, microfilming, recording
or otherwise, without written permission from the Publisher, with the exception
of any material supplied specifically for the purpose of being entered
and executed on a computer system, for exclusive use by the purchaser of the work.
Printed on acid-free paper
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Preface
This book is part of the Analog Circuit Design series and contains the revised
contributions of all speakers of the 17th workshop on Advances in Analog Circuit
Design (AACD), which was organized by Andrea Baschirotto and Piero Malcaovati
of the University of Pavia. This year it was held at the University of Pavia in the
magnificent auditoria “Aula Volta”.
The book contains the contribution of 18 tutorials, divided in three chapters, each
discussing a specific to-date topic on new and valuable design ideas in the area of
analog circuit design. Each part is presented by six experts in that field and state-of-
the-art information is shared and overviewed. The topics of 2008 are:
r High-speed Clock and Data Recovery
r High-performance Amplifiers
r Power Management
The aim of the AACD workshop is to bring together a group of expert designers
to study and discuss new possible and future developments in the area of analog
circuit design. Each AACD workshop has given rise to the publication of a book by
Springer in their successful series of Analog Circuit Design. This book is number
17 in this series. These books can be seen as a reference to those people involved in
analog and mixed signal design. The full list of the previous books and topics in the
series is enclosed below.
We sincerely hope that this 17th book is an added value in this series and provides
a valuable contributions to our Analog Circuit Design community.
Michiel Steyaert
v
vi Preface
Table other topics covered before in this series:
2007 Oostende (Belgium) Sensors, Actuators and Power Drivers for the Automotive
and Industrial Environment Integrated PAs from Wireline
to RF Very High Frequency Front Ends
2006 Maastricht (The High-speed AD converters Automotive Electronics: EMC
Netherlands) issues Ultra Low Power Wireless
2005 Limerick (Ireland) RF Circuits: Wide Band, Front-Ends, DACs Design
Methodology and Verification of RF and Mixed-Signal
Systems Low Power and Low Voltage
2004 Montreux (Swiss) Sensor and Actuator Interface Electronics Integrated
High-Voltage Electronics and Power Management
Low-Power and High-Resolution ADCs
2003 Graz (Austria) Fractional-N Synthesizers Design for Robustness Line and
Bus drivers
2002 Spa (Belgium) Structured Mixed-Mode Design Multi-Bit Sigma-Delta
Converters Short-Range RF Circuits
2001 Noordwijk (The Scalable Analog Circuits High-Speed D/A Converters RF
Netherlands) Power Amplifiers
2000 Munich (Germany) High-Speed A/D Converters Mixed-Signal Design PLLs
and Synthesizers
1999 Nice (France) XDSL and Other Communication Systems RF-MOST
Models and Behavioural Modelling Integrated Filters and
Oscillators
1998 Copenhagen (Denmark) 1-Volt Electronics Mixed-Mode Systems LNAs and RF
Power Amps for Telecom
1997 Como (Italy) RF A/D Converters Sensor and Actuator Interfaces
Low-Noise Oscillators, PLLs and Synthesizers
1996 Lausanne (Swiss) RF CMOS Circuit Design Bandpass Sigma Delta and Other
Data Converters Translinear Circuits
1995 Villach (Austria) Low-Noise/Power/Voltage Mixed-Mode with CAD tools
Voltage, Current and Time References
1994 Eindhoven Low-Power Low-Voltage Integrated Filters Smart Power
(Netherlands)
1993 Leuven (Belgium) Mixed-Mode A/D Design Sensor Interfaces
Communication Circuits
1992 Scheveningen (The OpAmps ADC Analog CAD
Netherlands)
Contents
Part I High-Speed Clock and Data Recovery
Fundamental Stochastic Jitter Processes Associated with Clock
and Data Recovery: A Tutorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Anthony Fraser Sanders
Clock Recovery and Equalization Techniques for Lossy Channels
in Multi Gb/s Serial Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
M. Pozzoni, S. Erba, P. Viola, M. Pisati, E. Depaoli, D. Sanzogni, R. Brama,
D. Baldi, M. Repossi and F. Svelto
Top-Down Bottom-Up Design Methodology for Fast and Reliable Serdes
Developments in nm Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Jan Crols
Mixed-Signal Implementation Strategies for High Performance Clock
and Data Recovery Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Michael H. Perrott
Jointly Optimize Equalizer and CDR for Multi-Gigabit/s SerDes . . . . . . . . 63
Song Wu and Robert Payne
Time to Digital Conversion: An Alternative View on Synchronization . . . . 77
J. Daniels, W. Dehaene and M. Steyaert
Part II High-Performance Amplifiers
Dynamic Offset Cancellation in Operational Amplifiers and
Instrumentation Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Johan H. Huijsing
Current Sense Amplifiers with Extended Common Mode Voltage Range . . 125
W.J. Kindt
vii
viii Contents
Low-Voltage Power-Efficient Amplifiers for Emerging Applications . . . . . . 147
A. López-Martin, R.G. Carvajal, E. López-Morillo, L. Acosta,
T. Sánchez-Rodriguez, C. Rubia-Marcos and J. Ramı́rez-Angulo
Integrated Amplifier Architectures for Efficient Coupling to the Nervous
System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Timothy Denison, Gregory Molnar and Reid R. Harrison
Transimpedance Amplifiers for Extremely High Sensitivity Impedance
Measurements on Nanodevices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
Giorgio Ferrari, Fabio Gozzini and Marco Sampietro
Design of High Power Class-D Audio Amplifiers . . . . . . . . . . . . . . . . . . . . . . . 209
Marco Berkhout
Part III Power Management
Single-Inductor Multiple-Output Dc-Dc Converters . . . . . . . . . . . . . . . . . . . . 233
Massimiliano Belloni, Edoardo Bonizzoni and Franco Maloberti
Enhanced Ripple Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Richard Redl
Robust DCDC Converter for Automotive Applications . . . . . . . . . . . . . . . . . . 269
Ivan Koudar
Highly Integrated Power Managemant Integrated Circuits in Advanced
Cmos Process Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
Mario Manninger
Wideband Efficient Amplifiers for On-Chip Adaptive Power
Management Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Lázaro Marco, Vahid Yousefzadeh, Albert Garcı́a-Tormo, Alberto Poveda,
Dragan Maksimović and Eduard Alarcón
Design Methodology and Circuit Techniques for Any-Load Stable LDOs
with Instant Load Regulation and Low Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Vadim Ivanov
Contributors
L. Acosta Escuela Superior de Ingenieros, Universidad de Sevilla, Camino de los
Descubrimientos s/n, 41092 Sevilla, Spain
Eduard Alarcón Technical University of Catalunya, Barcelona, Spain
D. Baldi STMicroelectronics, Pavia, Italy
Massimiliano Belloni Department of Electronics, University of Pavia, Via Ferrata,
1-27100 Pavia, Italy, [email protected]
Marco Berkhout NXP Semiconductors, Nijmegen, The Netherlands,
[email protected]
Edoardo Bonizzoni Department of Electronics, University of Pavia, Via Ferrata,
1 - 27100 Pavia, Italy, [email protected]
R. Brama Università di Modena e Reggio Emilia, Reggio Emilia, Italy
R. G. Carvajal Escuela Superior de Ingenieros, Universidad de Sevilla, Camino de
los Descubrimientos s/n, 41092 Sevilla, Spain, [email protected]
Jan Crols AnSem, Heverlee, Belgium, [email protected]
J. Daniels ESAT–MICAS, K.U. Leuven, Heverlee, Belgium
W. Dehaene ESAT-MICAS, K.U. Leuven, Heverlee, Belgium
Timothy Denison Medtronic Neuromodulation Technology, Minneapolis, MN
55410, USA
E. Depaoli STMicroelectronics, Pavia, Italy
S. Erba STMicroelectronics, Pavia, Italy
Giorgio Ferrari Politecnico di Milano, Dipartimento di Elettronica e Informazione
P.za L.da Vinci 32, 20133 Milano, Italy
ix
x Contributors
Albert Garcı́a-Tormo Technical University of Catalunya, Barcelona, Spain
Fabio Gozzini Politecnico di Milano, Dipartimento di Elettronica e Informazione,
P.za L.da Vinci 32, 20133 Milano, Italy
Reid R. Harrison Department of Electrical and Computer Engineering, University
of Utah, Salt Lake City, UT, 84112, USA
Johan H. Huijsing Delft University of Technology, Delft, The Netherlands,
[email protected]
Vadim Ivanov Texas Instruments, Inc., Tucson, AZ 85706. USA,
ivanov [email protected]
W.J. Kindt Delft Design Center, National Semiconductor Corporation, Delft,
Netherlands, [email protected]
Ivan Koudar AMI Semiconductor, Czech Republic, Ivan [email protected]
A. López-Martin Department of Electrical & Electronic Engeneering, Public
University of Navarra, 31620 Pamplona, Spain
E. López-Morillo Escuela Superior de Ingenieros, Universidad de Sevilla, Camino
de los Descubrimientos s/n, 41092 Sevilla, Spain
Dragan Maksimović CoPEC Center, ECE Department, University of Colorado,
Boulder, CO 80309-0425, USA, [email protected]
Franco Maloberti Department of Electronics, University of Pavia, Via Ferrata,
1 - 27100 Pavia, Italy, [email protected]
Mario Manninger austriamicrosystems AG, Unterpremstätten, Austria,
[email protected]
Lázaro Marco Technical University of Catalunya, Barcelona, Spain
Gregory Molnar Medtronic Neuromodulation Technology, Minneapolis, MN
55410, USA
Robert Payne Texas Instruments, Inc., Dallas TX, USA
Michael H. Perrott Massachusetts Institute of Technology, Cambridge, MA, USA,
[email protected]
M. Pisati STMicroelectronics, Pavia, Italy
Alberto Poveda Technical University of Catalunya, Barcelona, Spain
M. Pozzoni STMicroelectronics, Pavia, Italy, [email protected]
J. Ramı́rez-Angulo Klipsch School of Electrical and Computer Engineering, New
Mexico State University, Dept.3-0 Las Cruces, NM 88003-0001, USA
Contributors xi
Richard Redl ELFI S.A., Montévaux 14, CH-1726 Farvagny, Switzerland,
[email protected]
M. Repossi STMicroelectronics, Pavia, Italy
C. Rubia-Marcos Escuela Superior de Ingenieros, Universidad de Sevilla, Camino
de los Descubrimientos s/n, 41092 Sevilla, Spain
Marco Sampietro Politecnico di Milano, Dipartimento di Elettronica e
Informazione P.za L.da Vinci 32, 20133 Milano, Italy, [email protected]
T. Sánchez-Rodriguez Escuela Superior de Ingenieros, Universidad de Sevilla,
Camino de los Descubrimientos s/n, 41092 Sevilla, Spain
Anthony Fraser SandersSenior Principal, Infineon Technologies
D. Sanzogni STMicroelectronics, Pavia, Italy
M. Steyaert ESAT-MICAS, K.U. Leuven, Heverlee, Belgium
F. Svelto Università degli Studi di Pavia, Pavia, Italy
P. Viola STMicroelectronics, Pavia, Italy
Song Wu Xilinx, Inc., Dallas TX, USA, [email protected]
Vahid Yousefzadeh CoPEC Center, ECE Department, University of Colorado,
Boulder, CO, 80309-0425, USA